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esp-idf/components/freertos/port/xtensa
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Marius Vikhammer eec2419390 system: enable shared stack watchpoint 
Enable shared stack watchpoint for overflow detection

Enable unit tests:
 * "test printf using shared buffer stack" for C3
 * "Test vTaskDelayUntil" for S2
 * "UART can do poll()" for C3
2021-02-18 15:38:30 +08:00
..
include/freertos CI: enable example builds for C3 2021-02-09 12:04:02 +08:00
port.c system: enable shared stack watchpoint 2021-02-18 15:38:30 +08:00
portasm.S freertos: Add RISC-V port 2020-11-13 07:49:11 +11:00
readme_xtensa.txt freertos: Add RISC-V port 2020-11-13 07:49:11 +11:00
xt_asm_utils.h freertos: Add RISC-V port 2020-11-13 07:49:11 +11:00
xtensa_context.S freertos: Add RISC-V port 2020-11-13 07:49:11 +11:00
xtensa_init.c freertos: Add RISC-V port 2020-11-13 07:49:11 +11:00
xtensa_loadstore_handler.S freertos: Add RISC-V port 2020-11-13 07:49:11 +11:00
xtensa_overlay_os_hook.c freertos: Add RISC-V port 2020-11-13 07:49:11 +11:00
xtensa_vector_defaults.S freertos: Add RISC-V port 2020-11-13 07:49:11 +11:00
xtensa_vectors.S freertos: Add RISC-V port 2020-11-13 07:49:11 +11:00