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271 lines
9.7 KiB
C
271 lines
9.7 KiB
C
/*
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Tests for the spi_slave device driver
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*/
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#include <string.h>
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#include "sdkconfig.h"
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#include "unity.h"
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#include "test/test_common_spi.h"
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#include "driver/spi_master.h"
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#include "driver/spi_slave.h"
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#include "driver/gpio.h"
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#include "esp_log.h"
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#include "esp_rom_gpio.h"
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//There is only one GPSPI controller, so single-board test is disabled.
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#if !DISABLED_FOR_TARGETS(ESP32C3)
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#ifndef CONFIG_SPIRAM
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//This test should be removed once the timing test is merged.
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#define MASTER_SEND {0x93, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, 0xf0, 0xaa, 0xcc, 0xff, 0xee, 0x55, 0x77, 0x88, 0x43}
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#define SLAVE_SEND { 0xaa, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10, 0x13, 0x57, 0x9b, 0xdf, 0x24, 0x68, 0xac, 0xe0 }
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static inline void int_connect( uint32_t gpio, uint32_t sigo, uint32_t sigi )
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{
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esp_rom_gpio_connect_out_signal( gpio, sigo, false, false );
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esp_rom_gpio_connect_in_signal( gpio, sigi, false );
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}
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static void master_init_nodma( spi_device_handle_t* spi)
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{
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esp_err_t ret;
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spi_bus_config_t buscfg={
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.miso_io_num=PIN_NUM_MISO,
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.mosi_io_num=PIN_NUM_MOSI,
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.sclk_io_num=PIN_NUM_CLK,
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.quadwp_io_num=UNCONNECTED_PIN,
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.quadhd_io_num=-1
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};
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spi_device_interface_config_t devcfg={
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.clock_speed_hz=4*1000*1000, //currently only up to 4MHz for internel connect
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.mode=0, //SPI mode 0
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.spics_io_num=PIN_NUM_CS, //CS pin
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.queue_size=7, //We want to be able to queue 7 transactions at a time
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.pre_cb=NULL,
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.cs_ena_posttrans=5,
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.cs_ena_pretrans=1,
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};
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//Initialize the SPI bus
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ret=spi_bus_initialize(TEST_SPI_HOST, &buscfg, 0);
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TEST_ASSERT(ret==ESP_OK);
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//Attach the LCD to the SPI bus
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ret=spi_bus_add_device(TEST_SPI_HOST, &devcfg, spi);
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TEST_ASSERT(ret==ESP_OK);
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}
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static void slave_init(void)
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{
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//Configuration for the SPI bus
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spi_bus_config_t buscfg={
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.mosi_io_num=PIN_NUM_MOSI,
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.miso_io_num=PIN_NUM_MISO,
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.sclk_io_num=PIN_NUM_CLK
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};
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//Configuration for the SPI slave interface
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spi_slave_interface_config_t slvcfg={
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.mode=0,
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.spics_io_num=PIN_NUM_CS,
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.queue_size=3,
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.flags=0,
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};
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//Enable pull-ups on SPI lines so we don't detect rogue pulses when no master is connected.
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gpio_set_pull_mode(PIN_NUM_MOSI, GPIO_PULLUP_ONLY);
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gpio_set_pull_mode(PIN_NUM_CLK, GPIO_PULLUP_ONLY);
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gpio_set_pull_mode(PIN_NUM_CS, GPIO_PULLUP_ONLY);
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//Initialize SPI slave interface
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TEST_ESP_OK( spi_slave_initialize(TEST_SLAVE_HOST, &buscfg, &slvcfg, 2) );
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}
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TEST_CASE("test slave send unaligned","[spi]")
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{
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WORD_ALIGNED_ATTR uint8_t master_txbuf[320]=MASTER_SEND;
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WORD_ALIGNED_ATTR uint8_t master_rxbuf[320];
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WORD_ALIGNED_ATTR uint8_t slave_txbuf[320]=SLAVE_SEND;
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WORD_ALIGNED_ATTR uint8_t slave_rxbuf[320];
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spi_device_handle_t spi;
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//initial master
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master_init_nodma( &spi );
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//initial slave
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slave_init();
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//do internal connection
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int_connect( PIN_NUM_MOSI, spi_periph_signal[TEST_SPI_HOST].spid_out, spi_periph_signal[TEST_SLAVE_HOST].spiq_in );
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int_connect( PIN_NUM_MISO, spi_periph_signal[TEST_SLAVE_HOST].spiq_out, spi_periph_signal[TEST_SPI_HOST].spid_in );
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int_connect( PIN_NUM_CS, spi_periph_signal[TEST_SPI_HOST].spics_out[0], spi_periph_signal[TEST_SLAVE_HOST].spics_in );
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int_connect( PIN_NUM_CLK, spi_periph_signal[TEST_SPI_HOST].spiclk_out, spi_periph_signal[TEST_SLAVE_HOST].spiclk_in );
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for ( int i = 0; i < 4; i ++ ) {
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//slave send
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spi_slave_transaction_t slave_t;
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spi_slave_transaction_t* out;
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memset(&slave_t, 0, sizeof(spi_slave_transaction_t));
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slave_t.length=8*32;
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slave_t.tx_buffer=slave_txbuf+i;
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slave_t.rx_buffer=slave_rxbuf;
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TEST_ESP_OK(spi_slave_queue_trans(TEST_SLAVE_HOST, &slave_t, portMAX_DELAY));
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//send
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spi_transaction_t t = {};
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t.length = 32*(i+1);
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if ( t.length != 0 ) {
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t.tx_buffer = master_txbuf+i;
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t.rx_buffer = master_rxbuf+i;
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}
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spi_device_transmit( spi, (spi_transaction_t*)&t );
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//wait for end
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TEST_ESP_OK(spi_slave_get_trans_result(TEST_SLAVE_HOST, &out, portMAX_DELAY));
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//show result
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ESP_LOGI(SLAVE_TAG, "trans_len: %d", slave_t.trans_len);
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ESP_LOG_BUFFER_HEX( "master tx", t.tx_buffer, t.length/8 );
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ESP_LOG_BUFFER_HEX( "master rx", t.rx_buffer, t.length/8 );
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ESP_LOG_BUFFER_HEX( "slave tx", slave_t.tx_buffer, (slave_t.trans_len+7)/8);
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ESP_LOG_BUFFER_HEX( "slave rx", slave_t.rx_buffer, (slave_t.trans_len+7)/8);
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TEST_ASSERT_EQUAL_HEX8_ARRAY( t.tx_buffer, slave_t.rx_buffer, t.length/8 );
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TEST_ASSERT_EQUAL_HEX8_ARRAY( slave_t.tx_buffer, t.rx_buffer, t.length/8 );
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TEST_ASSERT_EQUAL( t.length, slave_t.trans_len );
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//clean
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memset( master_rxbuf, 0x66, sizeof(master_rxbuf));
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memset( slave_rxbuf, 0x66, sizeof(slave_rxbuf));
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}
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TEST_ASSERT(spi_slave_free(TEST_SLAVE_HOST) == ESP_OK);
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TEST_ASSERT(spi_bus_remove_device(spi) == ESP_OK);
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TEST_ASSERT(spi_bus_free(TEST_SPI_HOST) == ESP_OK);
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ESP_LOGI(MASTER_TAG, "test passed.");
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}
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#endif // !CONFIG_SPIRAM
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#endif // !TEMPORARY_DISABLED_FOR_TARGETS
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#if !DISABLED_FOR_TARGETS(ESP32, ESP32S2, ESP32S3)
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//These tests are for chips which only have 1 SPI controller
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/********************************************************************************
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* Test By Master & Slave (2 boards)
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*
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* PIN | Master(C3) | Slave (C3) |
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* ----| --------- | --------- |
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* CS | 10 | 10 |
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* CLK | 6 | 6 |
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* MOSI| 7 | 7 |
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* MISO| 2 | 2 |
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* GND | GND | GND |
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*
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********************************************************************************/
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#define BUF_SIZE 320
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static void unaligned_test_master(void)
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{
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spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
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TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, 0));
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spi_device_handle_t spi;
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spi_device_interface_config_t devcfg = SPI_DEVICE_TEST_DEFAULT_CONFIG();
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devcfg.clock_speed_hz = 4 * 1000 * 1000;
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devcfg.queue_size = 7;
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TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, &spi));
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uint8_t *master_send_buf = heap_caps_malloc(BUF_SIZE, MALLOC_CAP_DMA);
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uint8_t *master_recv_buf = heap_caps_calloc(BUF_SIZE, 1, MALLOC_CAP_DMA);
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//This buffer is used for 2-board test and should be assigned totally the same as the ``test_slave_loop`` does.
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uint8_t *slave_send_buf = heap_caps_malloc(BUF_SIZE, MALLOC_CAP_DMA);
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srand(199);
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for (int i = 0; i < BUF_SIZE; i++) {
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master_send_buf[i] = rand();
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}
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srand(299);
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for (int i = 0; i < BUF_SIZE; i++) {
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slave_send_buf[i] = rand();
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}
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for (int i = 0; i < 4; i++) {
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uint32_t length_in_bytes = 4 * (i + 1);
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spi_transaction_t t = {
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.tx_buffer = master_send_buf + i,
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.rx_buffer = master_recv_buf,
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.length = length_in_bytes * 8,
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};
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unity_wait_for_signal("slave ready");
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TEST_ESP_OK(spi_device_transmit(spi, (spi_transaction_t*)&t));
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//show result
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ESP_LOG_BUFFER_HEX("master tx:", master_send_buf+i, length_in_bytes);
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ESP_LOG_BUFFER_HEX("master rx:", master_recv_buf, length_in_bytes);
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TEST_ASSERT_EQUAL_HEX8_ARRAY(slave_send_buf+i, master_recv_buf, length_in_bytes);
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//clean
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memset(master_recv_buf, 0x00, BUF_SIZE);
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}
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free(master_send_buf);
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free(master_recv_buf);
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free(slave_send_buf);
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TEST_ASSERT(spi_bus_remove_device(spi) == ESP_OK);
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TEST_ASSERT(spi_bus_free(TEST_SPI_HOST) == ESP_OK);
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}
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static void unaligned_test_slave(void)
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{
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spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
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spi_slave_interface_config_t slvcfg = SPI_SLAVE_TEST_DEFAULT_CONFIG();
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TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &buscfg, &slvcfg, TEST_SLAVE_HOST));
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uint8_t *slave_send_buf = heap_caps_malloc(BUF_SIZE, MALLOC_CAP_DMA);
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uint8_t *slave_recv_buf = heap_caps_calloc(BUF_SIZE, 1, MALLOC_CAP_DMA);
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//This buffer is used for 2-board test and should be assigned totally the same as the ``test_slave_loop`` does.
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uint8_t *master_send_buf = heap_caps_malloc(BUF_SIZE, MALLOC_CAP_DMA);
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srand(199);
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for (int i = 0; i < BUF_SIZE; i++) {
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master_send_buf[i] = rand();
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}
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srand(299);
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for (int i = 0; i < BUF_SIZE; i++) {
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slave_send_buf[i] = rand();
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}
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for (int i = 0; i < 4; i++) {
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uint32_t mst_length_in_bytes = 4 * (i + 1);
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spi_slave_transaction_t slave_t = {
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.tx_buffer = slave_send_buf + i,
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.rx_buffer = slave_recv_buf,
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.length = 32 * 8,
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};
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unity_send_signal("slave ready");
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TEST_ESP_OK(spi_slave_transmit(TEST_SLAVE_HOST, &slave_t, portMAX_DELAY));
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//show result
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ESP_LOGI(SLAVE_TAG, "trans_len: %d", slave_t.trans_len);
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ESP_LOG_BUFFER_HEX("slave tx:", slave_send_buf + i, mst_length_in_bytes);
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ESP_LOG_BUFFER_HEX("slave rx:", slave_recv_buf, mst_length_in_bytes);
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TEST_ASSERT_EQUAL(mst_length_in_bytes * 8, slave_t.trans_len);
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TEST_ASSERT_EQUAL_HEX8_ARRAY(master_send_buf + i, slave_recv_buf, mst_length_in_bytes);
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//clean
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memset(slave_recv_buf, 0x00, BUF_SIZE);
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}
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free(slave_send_buf);
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free(slave_recv_buf);
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free(master_send_buf);
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TEST_ASSERT(spi_slave_free(TEST_SLAVE_HOST) == ESP_OK);
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}
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TEST_CASE_MULTIPLE_DEVICES("SPI_Slave_Unaligned_Test", "[spi_ms][spi_slave]", unaligned_test_master, unaligned_test_slave);
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#endif //#if !DISABLED_FOR_TARGETS(ESP32, ESP32S2, ESP32S3)
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