mirror of
https://github.com/espressif/esp-idf.git
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304 lines
10 KiB
C
304 lines
10 KiB
C
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#include <stdbool.h>
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#include "esp_attr.h"
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#include "soc/periph_defs.h"
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#include "soc/system_reg.h"
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#include "soc/syscon_reg.h"
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#include "soc/dport_access.h"
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static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph)
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{
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switch (periph) {
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case PERIPH_LEDC_MODULE:
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return DPORT_LEDC_CLK_EN;
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case PERIPH_UART0_MODULE:
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return DPORT_UART_CLK_EN;
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case PERIPH_UART1_MODULE:
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return DPORT_UART1_CLK_EN;
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case PERIPH_USB_MODULE:
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return DPORT_USB_CLK_EN;
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case PERIPH_I2C0_MODULE:
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return DPORT_I2C_EXT0_CLK_EN;
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case PERIPH_I2C1_MODULE:
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return DPORT_I2C_EXT1_CLK_EN;
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case PERIPH_I2S0_MODULE:
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return DPORT_I2S0_CLK_EN;
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case PERIPH_I2S1_MODULE:
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return DPORT_I2S1_CLK_EN;
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case PERIPH_TIMG0_MODULE:
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return DPORT_TIMERGROUP_CLK_EN;
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case PERIPH_TIMG1_MODULE:
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return DPORT_TIMERGROUP1_CLK_EN;
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case PERIPH_PWM0_MODULE:
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return DPORT_PWM0_CLK_EN;
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case PERIPH_PWM1_MODULE:
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return DPORT_PWM1_CLK_EN;
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case PERIPH_PWM2_MODULE:
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return DPORT_PWM2_CLK_EN;
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case PERIPH_PWM3_MODULE:
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return DPORT_PWM3_CLK_EN;
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case PERIPH_UHCI0_MODULE:
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return DPORT_UHCI0_CLK_EN;
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case PERIPH_UHCI1_MODULE:
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return DPORT_UHCI1_CLK_EN;
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case PERIPH_RMT_MODULE:
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return DPORT_RMT_CLK_EN;
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case PERIPH_PCNT_MODULE:
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return DPORT_PCNT_CLK_EN;
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case PERIPH_SPI_MODULE:
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return DPORT_SPI01_CLK_EN;
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case PERIPH_FSPI_MODULE:
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return DPORT_SPI2_CLK_EN;
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case PERIPH_HSPI_MODULE:
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return DPORT_SPI3_CLK_EN;
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case PERIPH_SPI2_DMA_MODULE:
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return DPORT_SPI2_DMA_CLK_EN;
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case PERIPH_SPI3_DMA_MODULE:
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return DPORT_SPI3_DMA_CLK_EN;
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case PERIPH_TWAI_MODULE:
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return DPORT_TWAI_CLK_EN;
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case PERIPH_RNG_MODULE:
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return DPORT_WIFI_CLK_RNG_EN;
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case PERIPH_WIFI_MODULE:
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return DPORT_WIFI_CLK_WIFI_EN_M;
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case PERIPH_WIFI_BT_COMMON_MODULE:
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return DPORT_WIFI_CLK_WIFI_BT_COMMON_M;
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case PERIPH_SYSTIMER_MODULE:
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return DPORT_SYSTIMER_CLK_EN;
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case PERIPH_DEDIC_GPIO_MODULE:
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return DPORT_CLK_EN_DEDICATED_GPIO;
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case PERIPH_AES_MODULE:
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return DPORT_CRYPTO_AES_CLK_EN;
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case PERIPH_SHA_MODULE:
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return DPORT_CRYPTO_SHA_CLK_EN;
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case PERIPH_RSA_MODULE:
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return DPORT_CRYPTO_RSA_CLK_EN;
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case PERIPH_CRYPTO_DMA_MODULE:
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return DPORT_CRYPTO_DMA_CLK_EN;
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case PERIPH_SHA_DMA_MODULE:
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return DPORT_CRYPTO_DMA_CLK_EN | DPORT_CRYPTO_SHA_CLK_EN;
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case PERIPH_AES_DMA_MODULE:
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return DPORT_CRYPTO_DMA_CLK_EN | DPORT_CRYPTO_AES_CLK_EN;
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default:
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return 0;
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}
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}
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static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool enable)
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{
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(void)enable; // unused
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switch (periph) {
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case PERIPH_LEDC_MODULE:
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return DPORT_LEDC_RST;
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case PERIPH_UART0_MODULE:
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return DPORT_UART_RST;
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case PERIPH_UART1_MODULE:
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return DPORT_UART1_RST;
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case PERIPH_USB_MODULE:
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return DPORT_USB_RST;
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case PERIPH_I2C0_MODULE:
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return DPORT_I2C_EXT0_RST;
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case PERIPH_I2C1_MODULE:
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return DPORT_I2C_EXT1_RST;
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case PERIPH_I2S0_MODULE:
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return DPORT_I2S0_RST;
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case PERIPH_I2S1_MODULE:
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return DPORT_I2S1_RST;
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case PERIPH_TIMG0_MODULE:
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return DPORT_TIMERGROUP_RST;
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case PERIPH_TIMG1_MODULE:
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return DPORT_TIMERGROUP1_RST;
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case PERIPH_PWM0_MODULE:
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return DPORT_PWM0_RST;
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case PERIPH_PWM1_MODULE:
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return DPORT_PWM1_RST;
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case PERIPH_PWM2_MODULE:
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return DPORT_PWM2_RST;
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case PERIPH_PWM3_MODULE:
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return DPORT_PWM3_RST;
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case PERIPH_UHCI0_MODULE:
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return DPORT_UHCI0_RST;
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case PERIPH_UHCI1_MODULE:
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return DPORT_UHCI1_RST;
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case PERIPH_RMT_MODULE:
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return DPORT_RMT_RST;
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case PERIPH_PCNT_MODULE:
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return DPORT_PCNT_RST;
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case PERIPH_SPI_MODULE:
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return DPORT_SPI01_RST;
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case PERIPH_FSPI_MODULE:
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return DPORT_SPI2_RST;
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case PERIPH_HSPI_MODULE:
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return DPORT_SPI3_RST;
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case PERIPH_SPI2_DMA_MODULE:
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return DPORT_SPI2_DMA_RST;
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case PERIPH_SPI3_DMA_MODULE:
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return DPORT_SPI3_DMA_RST;
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case PERIPH_TWAI_MODULE:
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return DPORT_TWAI_RST;
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case PERIPH_SYSTIMER_MODULE:
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return DPORT_SYSTIMER_RST;
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case PERIPH_DEDIC_GPIO_MODULE:
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return DPORT_RST_EN_DEDICATED_GPIO;
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case PERIPH_AES_MODULE:
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if (enable == true) {
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// Clear reset on digital signature, otherwise AES unit is held in reset also.
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return (DPORT_CRYPTO_AES_RST | DPORT_CRYPTO_DS_RST);
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} else {
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//Don't return other units to reset, as this pulls reset on RSA & SHA units, respectively.
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return DPORT_CRYPTO_AES_RST;
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}
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case PERIPH_SHA_MODULE:
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if (enable == true) {
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// Clear reset on digital signature and HMAC, otherwise SHA is held in reset
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return (DPORT_CRYPTO_SHA_RST | DPORT_CRYPTO_DS_RST | DPORT_CRYPTO_HMAC_RST);
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} else {
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// Don't assert reset on secure boot, otherwise AES is held in reset
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return DPORT_CRYPTO_SHA_RST;
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}
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case PERIPH_RSA_MODULE:
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if (enable == true) {
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/* also clear reset on digital signature, otherwise RSA is held in reset */
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return (DPORT_CRYPTO_RSA_RST | DPORT_CRYPTO_DS_RST);
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} else {
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/* don't reset digital signature unit, as this resets AES also */
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return DPORT_CRYPTO_RSA_RST;
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}
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case PERIPH_CRYPTO_DMA_MODULE:
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return DPORT_CRYPTO_DMA_RST;
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case PERIPH_AES_DMA_MODULE:
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if (enable == true) {
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// Clear reset on digital signature, otherwise AES unit is held in reset also.
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return (DPORT_CRYPTO_AES_RST | DPORT_CRYPTO_DS_RST | DPORT_CRYPTO_DMA_RST);
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} else {
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//Don't return other units to reset, as this pulls reset on RSA & SHA units, respectively.
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return (DPORT_CRYPTO_AES_RST | DPORT_CRYPTO_DMA_RST);
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}
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case PERIPH_SHA_DMA_MODULE:
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if (enable == true) {
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// Clear reset on digital signature and HMAC, otherwise SHA is held in reset
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return (DPORT_CRYPTO_SHA_RST | DPORT_CRYPTO_DS_RST | DPORT_CRYPTO_HMAC_RST | DPORT_CRYPTO_DMA_RST);
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} else {
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// Don't assert reset on secure boot, otherwise AES is held in reset
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return (DPORT_CRYPTO_SHA_RST | DPORT_CRYPTO_DMA_RST);
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}
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default:
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return 0;
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}
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}
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static inline uint32_t periph_ll_get_clk_en_reg(periph_module_t periph)
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{
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switch (periph) {
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case PERIPH_DEDIC_GPIO_MODULE:
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return DPORT_CPU_PERI_CLK_EN_REG;
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case PERIPH_RNG_MODULE:
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case PERIPH_WIFI_MODULE:
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case PERIPH_WIFI_BT_COMMON_MODULE:
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return DPORT_WIFI_CLK_EN_REG;
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case PERIPH_AES_MODULE:
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case PERIPH_SHA_MODULE:
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case PERIPH_RSA_MODULE:
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case PERIPH_CRYPTO_DMA_MODULE:
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case PERIPH_AES_DMA_MODULE:
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case PERIPH_SHA_DMA_MODULE:
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return DPORT_PERIP_CLK_EN1_REG;
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default:
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return DPORT_PERIP_CLK_EN_REG;
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}
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}
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static inline uint32_t periph_ll_get_rst_en_reg(periph_module_t periph)
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{
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switch (periph) {
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case PERIPH_DEDIC_GPIO_MODULE:
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return DPORT_CPU_PERI_RST_EN_REG;
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case PERIPH_RNG_MODULE:
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case PERIPH_WIFI_MODULE:
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case PERIPH_WIFI_BT_COMMON_MODULE:
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return DPORT_CORE_RST_EN_REG;
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case PERIPH_AES_MODULE:
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case PERIPH_SHA_MODULE:
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case PERIPH_RSA_MODULE:
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case PERIPH_CRYPTO_DMA_MODULE:
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case PERIPH_AES_DMA_MODULE:
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case PERIPH_SHA_DMA_MODULE:
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return DPORT_PERIP_RST_EN1_REG;
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default:
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return DPORT_PERIP_RST_EN_REG;
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}
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}
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static inline void periph_ll_enable_clk_clear_rst(periph_module_t periph)
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{
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DPORT_SET_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph));
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DPORT_CLEAR_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, true));
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}
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static inline void periph_ll_disable_clk_set_rst(periph_module_t periph)
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{
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DPORT_CLEAR_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph));
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DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
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}
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static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rst(void)
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{
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DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_BT_COMMON_M);
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DPORT_CLEAR_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
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}
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static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rst(void)
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{
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DPORT_CLEAR_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_BT_COMMON_M);
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DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
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}
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static inline void periph_ll_reset(periph_module_t periph)
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{
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DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
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DPORT_CLEAR_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
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}
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static inline bool IRAM_ATTR periph_ll_periph_enabled(periph_module_t periph)
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{
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return DPORT_REG_GET_BIT(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)) == 0 &&
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DPORT_REG_GET_BIT(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)) != 0;
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}
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static inline void periph_ll_wifi_module_enable_clk_clear_rst(void)
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{
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DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_EN_M);
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DPORT_CLEAR_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
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}
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static inline void periph_ll_wifi_module_disable_clk_set_rst(void)
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{
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DPORT_CLEAR_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_EN_M);
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DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
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}
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#ifdef __cplusplus
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}
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#endif
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