mirror of
https://github.com/espressif/esp-idf.git
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9c8e4fd4c5
Enable building and running of unit tests in CI for C3 as well as fix related compile errors Also enables building of C3 test apps
122 lines
3.5 KiB
C
122 lines
3.5 KiB
C
/*
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Tests for the Wi-Fi
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*/
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#include "string.h"
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#include "esp_system.h"
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#include "unity.h"
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#include "esp_log.h"
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#include "nvs_flash.h"
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#include "test_utils.h"
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#include "esp_phy_init.h"
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#include <freertos/FreeRTOS.h>
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#include <freertos/task.h>
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#include <freertos/semphr.h>
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#include "soc/soc_caps.h"
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
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//Function just extern, need not test
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#if SOC_BT_SUPPORTED
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extern void bt_bb_init_cmplx(void);
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#endif
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extern void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu(void);
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extern void IRAM_ATTR spi_flash_enable_interrupts_caches_and_other_cpu(void);
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//Functions in librtc.a called by WIFI or Blutooth directly in ISR
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#if SOC_BT_SUPPORTED
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extern void bt_track_pll_cap(void);
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#endif
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static const char* TAG = "test_phy_rtc";
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static SemaphoreHandle_t semphr_done;
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//Functions in libphy.a called by WIFI or Blutooth directly in ISR
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static void test_phy_rtc_init(void)
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{
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esp_err_t ret = nvs_flash_init();
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if (ret == ESP_ERR_NVS_NO_FREE_PAGES || ret == ESP_ERR_NVS_NEW_VERSION_FOUND) {
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ESP_LOGI(TAG, "no free pages or nvs version mismatch, erase..");
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TEST_ESP_OK(nvs_flash_erase());
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ret = nvs_flash_init();
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}
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TEST_ESP_OK(ret);
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esp_phy_enable();
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//must run here, not blocking in above code
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TEST_ASSERT(1);
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nvs_flash_deinit();
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}
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static IRAM_ATTR void test_phy_rtc_cache_task(void *arg)
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{
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test_phy_rtc_init();
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#if CONFIG_IDF_TARGET_ESP32
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extern void force_wifi_mode(int);
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extern void unforce_wifi_mode(void);
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for (int i = 0; i < 2; i++) {
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ESP_LOGI(TAG, "Test force_wifi_mode(%d)...", i);
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spi_flash_disable_interrupts_caches_and_other_cpu();
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force_wifi_mode(i);
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spi_flash_enable_interrupts_caches_and_other_cpu();
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ESP_LOGI(TAG, "Test unforce_wifi_mode()...");
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spi_flash_disable_interrupts_caches_and_other_cpu();
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unforce_wifi_mode();
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spi_flash_enable_interrupts_caches_and_other_cpu();
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}
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#endif //CONFIG_IDF_TARGET_ESP32
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#if SOC_BT_SUPPORTED
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ESP_LOGI(TAG, "Test bt_track_pll_cap()...");
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spi_flash_disable_interrupts_caches_and_other_cpu();
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bt_track_pll_cap();
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spi_flash_enable_interrupts_caches_and_other_cpu();
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#if CONFIG_IDF_TARGET_ESP32
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extern void bt_bb_init_cmplx_reg(void);
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ESP_LOGI(TAG, "Test bt_bb_init_cmplx_reg()...");
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spi_flash_disable_interrupts_caches_and_other_cpu();
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bt_bb_init_cmplx_reg();
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spi_flash_enable_interrupts_caches_and_other_cpu();
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#endif //CONFIG_IDF_TARGET_ESP32
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#if CONFIG_IDF_TARGET_ESP32C3
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extern void bt_bb_v2_init_cmplx(int print_version);
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ESP_LOGI(TAG, "Test bt_bb_v2_init_cmplx()...");
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spi_flash_disable_interrupts_caches_and_other_cpu();
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bt_bb_v2_init_cmplx(0);
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spi_flash_enable_interrupts_caches_and_other_cpu();
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extern void coex_pti_v2(void);
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ESP_LOGI(TAG, "Test coex_pti_v2()...");
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spi_flash_disable_interrupts_caches_and_other_cpu();
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coex_pti_v2();
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spi_flash_enable_interrupts_caches_and_other_cpu();
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#endif //CONFIG_IDF_TARGET_ESP32C3
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#endif //SOC_BT_SUPPORTED
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TEST_ASSERT( xSemaphoreGive(semphr_done) );
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vTaskDelete(NULL);
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}
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TEST_CASE("Test PHY/RTC functions called when cache is disabled", "[phy_rtc][cache_disabled]")
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{
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semphr_done = xSemaphoreCreateCounting(1, 0);
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xTaskCreatePinnedToCore(test_phy_rtc_cache_task, "phy_rtc_test_task", 3072,
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NULL, configMAX_PRIORITIES-1, NULL, 0);
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TEST_ASSERT( xSemaphoreTake(semphr_done, portMAX_DELAY) );
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vSemaphoreDelete(semphr_done);
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}
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
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