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102 lines
2.3 KiB
C
102 lines
2.3 KiB
C
/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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// The LL layer for xtal32k WDT register operations.
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// Note that most of the register operations in this layer are non-atomic operations.
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#pragma once
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#include <stdbool.h>
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#include "soc/rtc_cntl_periph.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define XT_WDT_LL_XTAL32_DEAD_INTR_MASK RTC_CNTL_XTAL32K_DEAD_INT_ST_M
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/**
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* @brief Enable the XT_WDT
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*
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* @param hw Start address of the peripheral registers.
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*/
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inline void xt_wdt_ll_enable(rtc_cntl_dev_t *hw, bool enable)
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{
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hw->ext_xtl_conf.xtal32k_wdt_en = enable;
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}
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/**
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* @brief Check if the XT_WDT is enabled
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*
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* @param hw Start address of the peripheral registers.
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* @return True if XT WDT is enabled
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*/
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inline bool xt_wdt_ll_check_if_enabled(rtc_cntl_dev_t *hw)
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{
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return (hw->ext_xtl_conf.xtal32k_wdt_en) ? true : false;
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}
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/**
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* @brief Set the watchdog timeout value
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*
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* @param hw Start address of the peripheral registers.
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* @param timeout timeout value in RTC_CLK cycles
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*/
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inline void xt_wdt_ll_set_timeout(rtc_cntl_dev_t *hw, uint8_t timeout)
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{
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hw->xtal32k_conf.xtal32k_wdt_timeout = timeout;
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}
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/**
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* @brief Reset the XT_WDT
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*
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* @param hw Start address of the peripheral registers.
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*/
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inline void xt_wdt_ll_reset(rtc_cntl_dev_t *hw)
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{
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hw->ext_xtl_conf.xtal32k_wdt_reset = 1;
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hw->ext_xtl_conf.xtal32k_wdt_reset = 0;
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}
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/**
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* @brief Set the backup clock value
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*
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* @param hw Start address of the peripheral registers.
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* @param backup_clk_val Backup clock value, see TRM for definition
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*/
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inline void xt_wdt_ll_set_backup_clk_factor(rtc_cntl_dev_t *hw, uint32_t backup_clk_val)
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{
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hw->xtal32k_clk_factor = backup_clk_val;
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}
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/**
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* @brief Enable the auto-backup clock feature
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*
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* @param hw Start address of the peripheral registers.
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* @param enable True - enable, False - disable
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*/
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inline void xt_wdt_ll_auto_backup_enable(rtc_cntl_dev_t *hw, bool enable)
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{
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hw->ext_xtl_conf.xtal32k_auto_backup = enable;
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}
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/**
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* @brief Enable the timeout interrupt
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*
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* @param hw Start address of the peripheral registers.
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* @param enable True - enable, False - disable
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*/
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inline void xt_wdt_ll_intr_enable(rtc_cntl_dev_t *hw, bool enable)
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{
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hw->int_ena.rtc_xtal32k_dead = enable;
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}
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#ifdef __cplusplus
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}
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#endif
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