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ded528e188
Due to HW limitation, we don't support this anymore. On c3, ADC2 under oneshot mode is not stable. However, you can enable CONFIG_ADC_ONESHOT_FORCE_USE_ADC2_ON_C3 to force use ADC2. Refer to errata to know more details: https://www.espressif.com/sites/default/files/documentation/esp32-s3_errata_en.pdf https://www.espressif.com/sites/default/files/documentation/esp32-c3_errata_en.pdf
266 lines
10 KiB
C
266 lines
10 KiB
C
/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "esp_log.h"
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#include "soc/adc_periph.h"
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#include "esp_adc/adc_oneshot.h"
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#include "driver/gpio.h"
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#include "driver/rtc_io.h"
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#include "test_common_adc.h"
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const __attribute__((unused)) static char *TAG = "TEST_ADC";
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/*---------------------------------------------------------------
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ADC General Macros
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---------------------------------------------------------------*/
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//ADC Channels
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#if CONFIG_IDF_TARGET_ESP32
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#define ADC1_TEST_CHAN0 ADC_CHANNEL_4
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#define ADC1_TEST_CHAN1 ADC_CHANNEL_5
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#define ADC2_TEST_CHAN0 ADC_CHANNEL_0
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static const char *TAG_CH[2][10] = {{"ADC1_CH4", "ADC1_CH5"}, {"ADC2_CH0"}};
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#else
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#define ADC1_TEST_CHAN0 ADC_CHANNEL_2
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#define ADC1_TEST_CHAN1 ADC_CHANNEL_3
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#define ADC2_TEST_CHAN0 ADC_CHANNEL_0
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static const char *TAG_CH[2][10] = {{"ADC1_CH2", "ADC1_CH3"}, {"ADC2_CH0"}};
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#endif
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/*---------------------------------------------------------------
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ADC Oneshot High / Low test
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---------------------------------------------------------------*/
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//ESP32C3 ADC2 oneshot mode is not supported anymore
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#define ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2 ((SOC_ADC_PERIPH_NUM >= 2) && !CONFIG_IDF_TARGET_ESP32C3)
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TEST_CASE("ADC oneshot high/low test", "[adc_oneshot]")
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{
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static int adc_raw[2][10];
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//-------------ADC1 Init---------------//
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adc_oneshot_unit_handle_t adc1_handle;
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adc_oneshot_unit_init_cfg_t init_config1 = {
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.unit_id = ADC_UNIT_1,
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.ulp_mode = ADC_ULP_MODE_DISABLE,
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};
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TEST_ESP_OK(adc_oneshot_new_unit(&init_config1, &adc1_handle));
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#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
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//-------------ADC2 Init---------------//
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adc_oneshot_unit_handle_t adc2_handle;
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adc_oneshot_unit_init_cfg_t init_config2 = {
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.unit_id = ADC_UNIT_2,
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.ulp_mode = ADC_ULP_MODE_DISABLE,
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};
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TEST_ESP_OK(adc_oneshot_new_unit(&init_config2, &adc2_handle));
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#endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
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//-------------ADC1 TEST Channel 0 Config---------------//
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adc_oneshot_chan_cfg_t config = {
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.bitwidth = ADC_BITWIDTH_DEFAULT,
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.atten = ADC_ATTEN_DB_11,
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};
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TEST_ESP_OK(adc_oneshot_config_channel(adc1_handle, ADC1_TEST_CHAN0, &config));
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//-------------ADC1 TEST Channel 1 Config---------------//
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TEST_ESP_OK(adc_oneshot_config_channel(adc1_handle, ADC1_TEST_CHAN1, &config));
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#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
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//-------------ADC2 TEST Channel 0 Config---------------//
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TEST_ESP_OK(adc_oneshot_config_channel(adc2_handle, ADC2_TEST_CHAN0, &config));
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#endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
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test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN0, 0);
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TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN0, &adc_raw[0][0]));
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ESP_LOGI(TAG_CH[0][0], "raw data: %d", adc_raw[0][0]);
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TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw[0][0]);
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test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN1, 1);
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TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN1, &adc_raw[0][1]));
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ESP_LOGI(TAG_CH[0][1], "raw data: %d", adc_raw[0][1]);
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TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw[0][1]);
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#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
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test_adc_set_io_level(ADC_UNIT_2, ADC2_TEST_CHAN0, 0);
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TEST_ESP_OK(adc_oneshot_read(adc2_handle, ADC2_TEST_CHAN0, &adc_raw[1][0]));
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ESP_LOGI(TAG_CH[1][0], "raw data: %d", adc_raw[1][0]);
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TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw[1][0]);
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#endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
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test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN0, 1);
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TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN0, &adc_raw[0][0]));
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ESP_LOGI(TAG_CH[0][0], "raw data: %d", adc_raw[0][0]);
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TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw[0][0]);
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test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN1, 0);
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TEST_ESP_OK(adc_oneshot_read(adc1_handle, ADC1_TEST_CHAN1, &adc_raw[0][1]));
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ESP_LOGI(TAG_CH[0][1], "raw data: %d", adc_raw[0][1]);
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TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw[0][1]);
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#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
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test_adc_set_io_level(ADC_UNIT_2, ADC2_TEST_CHAN0, 1);
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TEST_ESP_OK(adc_oneshot_read(adc2_handle, ADC2_TEST_CHAN0, &adc_raw[1][0]));
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ESP_LOGI(TAG_CH[1][0], "raw data: %d", adc_raw[1][0]);
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TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw[1][0]);
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#endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
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TEST_ESP_OK(adc_oneshot_del_unit(adc1_handle));
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#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
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TEST_ESP_OK(adc_oneshot_del_unit(adc2_handle));
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#endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
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}
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#if SOC_ADC_CALIBRATION_V1_SUPPORTED
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/*---------------------------------------------------------------
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ADC Oneshot with Light Sleep
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---------------------------------------------------------------*/
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#include <inttypes.h>
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#include "esp_sleep.h"
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#include "esp_private/regi2c_ctrl.h"
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#include "soc/regi2c_saradc.h"
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#define TEST_REGI2C_ANA_CALI_BYTE_NUM 8
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static void s_adc_oneshot_with_sleep(adc_unit_t unit_id, adc_channel_t channel)
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{
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//-------------ADC Init---------------//
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adc_oneshot_unit_handle_t adc_handle;
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adc_oneshot_unit_init_cfg_t init_config = {
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.unit_id = unit_id,
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.ulp_mode = ADC_ULP_MODE_DISABLE,
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};
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TEST_ESP_OK(adc_oneshot_new_unit(&init_config, &adc_handle));
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//-------------ADC Channel Config---------------//
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adc_oneshot_chan_cfg_t config = {
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.bitwidth = SOC_ADC_RTC_MAX_BITWIDTH,
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};
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//-------------ADC Calibration Init---------------//
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bool do_calibration = false;
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adc_cali_handle_t cali_handle[TEST_ATTEN_NUMS] = {};
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for (int i = 0; i < TEST_ATTEN_NUMS; i++) {
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do_calibration = test_adc_calibration_init(unit_id, g_test_atten[i], SOC_ADC_RTC_MAX_BITWIDTH, &cali_handle[i]);
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}
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if (!do_calibration) {
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ESP_LOGW(TAG, "No efuse bits burnt, only test the regi2c analog register values");
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}
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for (int i = 0; i < TEST_ATTEN_NUMS; i++) {
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//-------------ADC Channel Config---------------//
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config.atten = g_test_atten[i];
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TEST_ESP_OK(adc_oneshot_config_channel(adc_handle, channel, &config));
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printf("Test with atten: %d\n", g_test_atten[i]);
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//---------------------------------Before Sleep-----------------------------------//
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printf("Before Light Sleep\n");
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int raw_expected = 0;
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int cali_expected = 0;
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uint8_t regi2c_cali_val_before[TEST_REGI2C_ANA_CALI_BYTE_NUM] = {};
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//Read
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TEST_ESP_OK(adc_oneshot_read(adc_handle, channel, &raw_expected));
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if (do_calibration) {
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TEST_ESP_OK(adc_cali_raw_to_voltage(cali_handle[i], raw_expected, &cali_expected));
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}
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//Print regi2c
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printf("regi2c cali val is: ");
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for (int j = 0; j < TEST_REGI2C_ANA_CALI_BYTE_NUM; j++) {
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regi2c_cali_val_before[j] = regi2c_ctrl_read_reg(I2C_SAR_ADC, I2C_SAR_ADC_HOSTID, j);
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printf("0x%x ", regi2c_cali_val_before[j]);
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}
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printf("\n");
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//Print result
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ESP_LOGI(TAG, "ADC%d Chan%d: raw data: %d", unit_id + 1, channel, raw_expected);
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ESP_LOGI(TAG, "ADC%d Chan%d: cali data: %d", unit_id + 1, channel, cali_expected);
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//---------------------------------Sleep-----------------------------------//
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esp_sleep_enable_timer_wakeup(30 * 1000);
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esp_light_sleep_start();
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//---------------------------------After Sleep-----------------------------------//
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printf("After Light Sleep\n");
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int raw_after_sleep = 0;
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int cali_after_sleep = 0;
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uint8_t regi2c_cali_val_after[TEST_REGI2C_ANA_CALI_BYTE_NUM] = {};
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//Print regi2c
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printf("regi2c cali val is: ");
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for (int i = 0; i < TEST_REGI2C_ANA_CALI_BYTE_NUM; i++) {
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regi2c_cali_val_after[i] = regi2c_ctrl_read_reg(I2C_SAR_ADC, I2C_SAR_ADC_HOSTID, i);
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printf("0x%x ", regi2c_cali_val_after[i]);
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}
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printf("\n");
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//Read
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TEST_ESP_OK(adc_oneshot_read(adc_handle, channel, &raw_after_sleep));
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if (do_calibration) {
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TEST_ESP_OK(adc_cali_raw_to_voltage(cali_handle[i], raw_after_sleep, &cali_after_sleep));
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}
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//Print result
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ESP_LOGI(TAG, "ADC%d Chan%d: raw data: %d", unit_id + 1, channel, raw_after_sleep);
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if (do_calibration) {
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ESP_LOGI(TAG, "ADC%d Chan%d: cali data: %d", unit_id + 1, channel, cali_after_sleep);
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}
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//Compare
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int32_t raw_diff = raw_expected - raw_after_sleep;
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ESP_LOGI(TAG, "ADC%d Chan%d: raw difference: %"PRId32, unit_id + 1, channel, raw_diff);
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if (do_calibration) {
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int32_t cali_diff = cali_expected - cali_after_sleep;
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ESP_LOGI(TAG, "ADC%d Chan%d: cali difference: %"PRId32, unit_id + 1, channel, cali_diff);
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}
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//Test Calibration registers
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for (int i = 0; i < TEST_REGI2C_ANA_CALI_BYTE_NUM; i++) {
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TEST_ASSERT_EQUAL(regi2c_cali_val_before[i], regi2c_cali_val_after[i]);
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}
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ESP_LOGI(TAG, "Cali register settings unchanged\n");
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}
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TEST_ESP_OK(adc_oneshot_del_unit(adc_handle));
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for (int i = 0; i < TEST_ATTEN_NUMS; i++) {
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if (cali_handle[i]) {
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test_adc_calibration_deinit(cali_handle[i]);
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}
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}
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}
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//ADC Channels
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#if CONFIG_IDF_TARGET_ESP32
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#define ADC1_SLEEP_TEST_CHAN ADC_CHANNEL_6
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#define ADC2_SLEEP_TEST_CHAN ADC_CHANNEL_0
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#else
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#define ADC1_SLEEP_TEST_CHAN ADC_CHANNEL_2
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#define ADC2_SLEEP_TEST_CHAN ADC_CHANNEL_0
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#endif
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TEST_CASE("test ADC1 Single Read with Light Sleep", "[adc][manul][ignore]")
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{
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s_adc_oneshot_with_sleep(ADC_UNIT_1, ADC1_SLEEP_TEST_CHAN);
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}
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#if (SOC_ADC_PERIPH_NUM >= 2) && !CONFIG_IDF_TARGET_ESP32C3
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//ESP32C3 ADC2 oneshot mode is not supported anymore
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TEST_CASE("test ADC2 Single Read with Light Sleep", "[adc][manul][ignore]")
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{
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s_adc_oneshot_with_sleep(ADC_UNIT_2, ADC2_SLEEP_TEST_CHAN);
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}
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#endif //#if (SOC_ADC_PERIPH_NUM >= 2) && !CONFIG_IDF_TARGET_ESP32C3
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#endif //#if SOC_ADC_CALIBRATION_V1_SUPPORTED
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