Omar Chebib 8fae0f0753 G0: Support Xtensa targets for G0-only compilation ... G0-only example now supports Xtensa targets. This means that G0 layer does not depend on G1+ layers anymore		2022-06-20 11:34:20 +00:00
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include/hal	G0: Support Xtensa targets for G0-only compilation	2022-06-20 11:34:20 +00:00
adc_hal.c	adc: support adc dma driver on all chips	2021-12-16 00:19:15 +00:00
brownout_hal.c	G0 RISC-V: Remove "private_include/regi2c_brownout.h" header as it has been moved and simplify "regi2c_ctrl.h"	2022-06-14 15:00:53 +08:00
efuse_hal.c	soc: Fix description of efuse fail bits	2022-05-31 11:21:24 +00:00
hmac_hal.c	hal: Add initial ESP32-C3 support	2020-11-30 15:23:15 +11:00
rtc_cntl_hal.c	light sleep: add cpu power down support for esp32s3	2021-08-27 11:11:06 +08:00