mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
9903ea1c11
Fix warnings where undefined vars are used. Make Kconfig emit "FOO=" for unset bool options To ensure make variables are always defined, even if empty. When writing auto.conf, include symbols disabled by dependency to make sure all make variables are always defined. Fixes espressif/esp-idf#137 Cherry-picked from https://github.com/espressif/esp-idf/pull/138
890 lines
32 KiB
Plaintext
890 lines
32 KiB
Plaintext
menu "ESP32-specific"
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choice ESP32_DEFAULT_CPU_FREQ_MHZ
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prompt "CPU frequency"
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default ESP32_DEFAULT_CPU_FREQ_160
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help
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CPU frequency to be set on application startup.
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config ESP32_DEFAULT_CPU_FREQ_80
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bool "80 MHz"
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config ESP32_DEFAULT_CPU_FREQ_160
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bool "160 MHz"
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config ESP32_DEFAULT_CPU_FREQ_240
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bool "240 MHz"
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endchoice
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config ESP32_DEFAULT_CPU_FREQ_MHZ
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int
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default 80 if ESP32_DEFAULT_CPU_FREQ_80
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default 160 if ESP32_DEFAULT_CPU_FREQ_160
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default 240 if ESP32_DEFAULT_CPU_FREQ_240
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config MEMMAP_SMP
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bool "Reserve memory for two cores"
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default "y"
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help
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The ESP32 contains two cores. If you plan to only use one, you can disable this item
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to save some memory. (ToDo: Make this automatically depend on unicore support)
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config SPIRAM_SUPPORT
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bool "Support for external, SPI-connected RAM"
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default "n"
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help
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This enables support for an external SPI RAM chip, connected in parallel with the
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main SPI flash chip.
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menu "SPI RAM config"
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depends on SPIRAM_SUPPORT
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config SPIRAM_BOOT_INIT
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bool "Initialize SPI RAM when booting the ESP32"
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default "y"
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help
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If this is enabled, the SPI RAM will be enabled during initial boot. Unless you
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have specific requirements, you'll want to leave this enabled so memory allocated
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during boot-up can also be placed in SPI RAM.
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choice SPIRAM_USE
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prompt "SPI RAM access method"
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default SPIRAM_USE_MEMMAP
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help
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The SPI RAM can be accessed in multiple methods: by just having it available as an unmanaged
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memory region in the ESP32 memory map, by integrating it in the ESP32s heap as 'special' memory
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needing heap_caps_malloc to allocate, or by fully integrating it making malloc() also able to
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return SPI RAM pointers.
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config SPIRAM_USE_MEMMAP
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bool "Integrate RAM into ESP32 memory map"
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config SPIRAM_USE_CAPS_ALLOC
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bool "Make RAM allocatable using heap_caps_malloc(..., MALLOC_CAP_SPISRAM)"
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depends on TO_BE_DONE
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config SPIRAM_USE_MALLOC
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bool "Make RAM allocatable using malloc as well"
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depends on TO_BE_DONE
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endchoice
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choice SPIRAM_TYPE
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prompt "Type of SPI RAM chip in use"
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default SPIRAM_TYPE_ESPPSRAM32
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config SPIRAM_TYPE_ESPPSRAM32
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bool "ESP-PSRAM32 or IS25WP032"
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endchoice
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config SPIRAM_SIZE
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int
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default 4194304 if SPIRAM_TYPE_ESPPSRAM32
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default 0
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choice SPIRAM_SPEED
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prompt "Set RAM clock speed"
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default SPIRAM_CACHE_SPEED_40M
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help
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Select the speed for the SPI RAM chip.
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If SPI RAM is enabled, we only support three combinations of SPI speed mode we supported now:
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1. Flash SPI running at 40Mhz and RAM SPI running at 40Mhz
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2. Flash SPI running at 80Mhz and RAM SPI running at 40Mhz
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3. Flash SPI running at 80Mhz and RAM SPI running at 80Mhz
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Note: If the third mode(80Mhz+80Mhz) is enabled, the VSPI port will be occupied by the system.
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Application code should never touch VSPI hardware in this case. The option to select
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80MHz will only be visible if the flash SPI speed is also 80MHz. (ESPTOOLPY_FLASHFREQ_80M is true)
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config SPIRAM_SPEED_40M
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bool "40MHz clock speed"
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config SPIRAM_SPEED_80M
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depends on ESPTOOLPY_FLASHFREQ_80M
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bool "80MHz clock speed"
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endchoice
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config SPIRAM_MEMTEST
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bool "Run memory test on SPI RAM initialization"
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default "y"
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help
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Runs a rudimentary memory test on initialization. Aborts when memory test fails. Disable this for
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slightly faster startop.
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config SPIRAM_CACHE_WORKAROUND
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bool "Enable workaround for bug in SPI RAM cache for Rev1 ESP32s"
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depends on SPIRAM_USE_MEMMAP || SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC
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default "y"
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help
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Revision 1 of the ESP32 has a bug that can cause a write to PSRAM not to take place in some situations
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when the cache line needs to be fetched from external RAM and an interrupt occurs. This enables a
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fix in the compiler that makes sure the specific code that is vulnerable to this will not be emitted.
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This will also not use any bits of newlib that are located in ROM, opting for a version that is compiled
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with the workaround and located in flash instead.
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endmenu
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config MEMMAP_TRACEMEM
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bool
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default "n"
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config MEMMAP_TRACEMEM_TWOBANKS
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bool
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default "n"
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config ESP32_TRAX
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bool "Use TRAX tracing feature"
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default "n"
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select MEMMAP_TRACEMEM
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help
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The ESP32 contains a feature which allows you to trace the execution path the processor
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has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
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of memory that can't be used for general purposes anymore. Disable this if you do not know
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what this is.
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config ESP32_TRAX_TWOBANKS
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bool "Reserve memory for tracing both pro as well as app cpu execution"
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default "n"
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depends on ESP32_TRAX && MEMMAP_SMP
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select MEMMAP_TRACEMEM_TWOBANKS
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help
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The ESP32 contains a feature which allows you to trace the execution path the processor
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has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
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of memory that can't be used for general purposes anymore. Disable this if you do not know
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what this is.
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# Memory to reverse for trace, used in linker script
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config TRACEMEM_RESERVE_DRAM
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hex
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default 0x8000 if MEMMAP_TRACEMEM && MEMMAP_TRACEMEM_TWOBANKS
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default 0x4000 if MEMMAP_TRACEMEM && !MEMMAP_TRACEMEM_TWOBANKS
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default 0x0
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choice ESP32_COREDUMP_TO_FLASH_OR_UART
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prompt "Core dump destination"
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default ESP32_ENABLE_COREDUMP_TO_NONE
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help
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Select place to store core dump: flash, uart or none (to disable core dumps generation).
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If core dump is configured to be stored in flash and custom partition table is used add
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corresponding entry to your CSV. For examples, please see predefined partition table CSV descriptions
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in the components/partition_table directory.
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config ESP32_ENABLE_COREDUMP_TO_FLASH
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bool "Flash"
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select ESP32_ENABLE_COREDUMP
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config ESP32_ENABLE_COREDUMP_TO_UART
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bool "UART"
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select ESP32_ENABLE_COREDUMP
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config ESP32_ENABLE_COREDUMP_TO_NONE
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bool "None"
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endchoice
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config ESP32_ENABLE_COREDUMP
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bool
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default F
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help
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Enables/disable core dump module.
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config ESP32_CORE_DUMP_UART_DELAY
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int "Core dump print to UART delay"
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depends on ESP32_ENABLE_COREDUMP_TO_UART
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default 0
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help
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Config delay (in ms) before printing core dump to UART.
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Delay can be interrupted by pressing Enter key.
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config ESP32_CORE_DUMP_LOG_LEVEL
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int "Core dump module logging level"
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depends on ESP32_ENABLE_COREDUMP
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default 1
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help
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Config core dump module logging level (0-5).
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choice NUMBER_OF_UNIVERSAL_MAC_ADDRESS
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bool "Number of universally administered (by IEEE) MAC address"
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default FOUR_UNIVERSAL_MAC_ADDRESS
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help
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Configure the number of universally administered (by IEEE) MAC addresses.
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During initialisation, MAC addresses for each network interface are generated or derived from a
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single base MAC address.
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If the number of universal MAC addresses is four, all four interfaces (WiFi station, WiFi softap,
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Bluetooth and Ethernet) receive a universally administered MAC address. These are generated
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sequentially by adding 0, 1, 2 and 3 (respectively) to the final octet of the base MAC address.
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If the number of universal MAC addresses is two, only two interfaces (WiFi station and Bluetooth)
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receive a universally administered MAC address. These are generated sequentially by adding 0
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and 1 (respectively) to the base MAC address. The remaining two interfaces (WiFi softap and Ethernet)
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receive local MAC addresses. These are derived from the universal WiFi station and Bluetooth MAC
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addresses, respectively.
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When using the default (Espressif-assigned) base MAC address, either setting can be used. When using
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a custom universal MAC address range, the correct setting will depend on the allocation of MAC
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addresses in this range (either 2 or 4 per device.)
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config TWO_UNIVERSAL_MAC_ADDRESS
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bool "Two"
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config FOUR_UNIVERSAL_MAC_ADDRESS
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bool "Four"
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endchoice
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config NUMBER_OF_UNIVERSAL_MAC_ADDRESS
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int
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default 2 if TWO_UNIVERSAL_MAC_ADDRESS
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default 4 if FOUR_UNIVERSAL_MAC_ADDRESS
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config SYSTEM_EVENT_QUEUE_SIZE
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int "System event queue size"
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default 32
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help
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Config system event queue size in different application.
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config SYSTEM_EVENT_TASK_STACK_SIZE
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int "Event loop task stack size"
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default 4096
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help
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Config system event task stack size in different application.
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config MAIN_TASK_STACK_SIZE
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int "Main task stack size"
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default 4096
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help
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Configure the "main task" stack size. This is the stack of the task
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which calls app_main(). If app_main() returns then this task is deleted
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and its stack memory is freed.
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config IPC_TASK_STACK_SIZE
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int "Inter-Processor Call (IPC) task stack size"
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default 1024
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range 512 65536 if !ESP32_APPTRACE_ENABLE
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range 2048 65536 if ESP32_APPTRACE_ENABLE
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help
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Configure the IPC tasks stack size. One IPC task runs on each core
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(in dual core mode), and allows for cross-core function calls.
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See IPC documentation for more details.
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The default stack size should be enough for most common use cases.
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It can be shrunk if you are sure that you do not use any custom
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IPC functionality.
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config TIMER_TASK_STACK_SIZE
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int "High-resolution timer task stack size"
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default 4096
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range 2048 65536
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help
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Configure the stack size of esp_timer/ets_timer task. This task is used
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to dispatch callbacks of timers created using ets_timer and esp_timer
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APIs. If you are seing stack overflow errors in timer task, increase
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this value.
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Note that this is not the same as FreeRTOS timer task. To configure
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FreeRTOS timer task size, see "FreeRTOS timer task stack size" option
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in "FreeRTOS" menu.
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choice NEWLIB_STDOUT_LINE_ENDING
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prompt "Line ending for UART output"
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default NEWLIB_STDOUT_LINE_ENDING_CRLF
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help
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This option allows configuring the desired line endings sent to UART
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when a newline ('\n', LF) appears on stdout.
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Three options are possible:
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CRLF: whenever LF is encountered, prepend it with CR
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LF: no modification is applied, stdout is sent as is
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CR: each occurence of LF is replaced with CR
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This option doesn't affect behavior of the UART driver (drivers/uart.h).
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config NEWLIB_STDOUT_LINE_ENDING_CRLF
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bool "CRLF"
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config NEWLIB_STDOUT_LINE_ENDING_LF
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bool "LF"
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config NEWLIB_STDOUT_LINE_ENDING_CR
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bool "CR"
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endchoice
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choice NEWLIB_STDIN_LINE_ENDING
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prompt "Line ending for UART input"
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default NEWLIB_STDIN_LINE_ENDING_CR
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help
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This option allows configuring which input sequence on UART produces
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a newline ('\n', LF) on stdin.
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Three options are possible:
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CRLF: CRLF is converted to LF
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LF: no modification is applied, input is sent to stdin as is
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CR: each occurence of CR is replaced with LF
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This option doesn't affect behavior of the UART driver (drivers/uart.h).
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config NEWLIB_STDIN_LINE_ENDING_CRLF
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bool "CRLF"
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config NEWLIB_STDIN_LINE_ENDING_LF
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bool "LF"
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config NEWLIB_STDIN_LINE_ENDING_CR
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bool "CR"
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endchoice
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config NEWLIB_NANO_FORMAT
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bool "Enable 'nano' formatting options for printf/scanf family"
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default n
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help
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ESP32 ROM contains parts of newlib C library, including printf/scanf family
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of functions. These functions have been compiled with so-called "nano"
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formatting option. This option doesn't support 64-bit integer formats and C99
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features, such as positional arguments.
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For more details about "nano" formatting option, please see newlib readme file,
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search for '--enable-newlib-nano-formatted-io':
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https://sourceware.org/newlib/README
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If this option is enabled, build system will use functions available in
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ROM, reducing the application binary size. Functions available in ROM run
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faster than functions which run from flash. Functions available in ROM can
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also run when flash instruction cache is disabled.
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If you need 64-bit integer formatting support or C99 features, keep this
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option disabled.
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choice CONSOLE_UART
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prompt "UART for console output"
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default CONSOLE_UART_DEFAULT
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help
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Select whether to use UART for console output (through stdout and stderr).
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- Default is to use UART0 on pins GPIO1(TX) and GPIO3(RX).
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- If "Custom" is selected, UART0 or UART1 can be chosen,
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and any pins can be selected.
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- If "None" is selected, there will be no console output on any UART, except
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for initial output from ROM bootloader. This output can be further suppressed by
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bootstrapping GPIO13 pin to low logic level.
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config CONSOLE_UART_DEFAULT
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bool "Default: UART0, TX=GPIO1, RX=GPIO3"
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config CONSOLE_UART_CUSTOM
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bool "Custom"
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config CONSOLE_UART_NONE
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bool "None"
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endchoice
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choice CONSOLE_UART_NUM
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prompt "UART peripheral to use for console output (0-1)"
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depends on CONSOLE_UART_CUSTOM
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default CONSOLE_UART_CUSTOM_NUM_0
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help
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Due of a ROM bug, UART2 is not supported for console output
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via ets_printf.
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config CONSOLE_UART_CUSTOM_NUM_0
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bool "UART0"
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config CONSOLE_UART_CUSTOM_NUM_1
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bool "UART1"
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endchoice
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config CONSOLE_UART_NUM
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int
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default 0 if CONSOLE_UART_DEFAULT || CONSOLE_UART_NONE
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default 0 if CONSOLE_UART_CUSTOM_NUM_0
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default 1 if CONSOLE_UART_CUSTOM_NUM_1
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config CONSOLE_UART_TX_GPIO
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int "UART TX on GPIO#"
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depends on CONSOLE_UART_CUSTOM
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range 0 33
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default 19
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config CONSOLE_UART_RX_GPIO
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int "UART RX on GPIO#"
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depends on CONSOLE_UART_CUSTOM
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range 0 39
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default 21
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config CONSOLE_UART_BAUDRATE
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int "UART console baud rate"
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depends on !CONSOLE_UART_NONE
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default 115200
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range 1200 4000000
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config ULP_COPROC_ENABLED
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bool "Enable Ultra Low Power (ULP) Coprocessor"
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default "n"
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help
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Set to 'y' if you plan to load a firmware for the coprocessor.
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If this option is enabled, further coprocessor configuration will appear in the Components menu.
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config ULP_COPROC_RESERVE_MEM
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int
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prompt "RTC slow memory reserved for coprocessor" if ULP_COPROC_ENABLED
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default 512 if ULP_COPROC_ENABLED
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range 32 8192 if ULP_COPROC_ENABLED
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default 0 if !ULP_COPROC_ENABLED
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range 0 0 if !ULP_COPROC_ENABLED
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help
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Bytes of memory to reserve for ULP coprocessor firmware & data.
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Data is reserved at the beginning of RTC slow memory.
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choice ESP32_PANIC
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prompt "Panic handler behaviour"
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default ESP32_PANIC_PRINT_REBOOT
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help
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If FreeRTOS detects unexpected behaviour or an unhandled exception, the panic handler is
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invoked. Configure the panic handlers action here.
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config ESP32_PANIC_PRINT_HALT
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bool "Print registers and halt"
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help
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Outputs the relevant registers over the serial port and halt the
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processor. Needs a manual reset to restart.
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config ESP32_PANIC_PRINT_REBOOT
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bool "Print registers and reboot"
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help
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Outputs the relevant registers over the serial port and immediately
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reset the processor.
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config ESP32_PANIC_SILENT_REBOOT
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bool "Silent reboot"
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help
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Just resets the processor without outputting anything
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config ESP32_PANIC_GDBSTUB
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bool "Invoke GDBStub"
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help
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Invoke gdbstub on the serial port, allowing for gdb to attach to it to do a postmortem
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of the crash.
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endchoice
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config ESP32_DEBUG_OCDAWARE
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bool "Make exception and panic handlers JTAG/OCD aware"
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default y
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help
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The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
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instead of panicking, have the debugger stop on the offending instruction.
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config INT_WDT
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bool "Interrupt watchdog"
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default y
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help
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This watchdog timer can detect if the FreeRTOS tick interrupt has not been called for a certain time,
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either because a task turned off interrupts and did not turn them on for a long time, or because an
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interrupt handler did not return. It will try to invoke the panic handler first and failing that
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reset the SoC.
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config INT_WDT_TIMEOUT_MS
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int "Interrupt watchdog timeout (ms)"
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depends on INT_WDT
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default 300
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range 10 10000
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help
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The timeout of the watchdog, in miliseconds. Make this higher than the FreeRTOS tick rate.
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config INT_WDT_CHECK_CPU1
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bool "Also watch CPU1 tick interrupt"
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depends on INT_WDT && !FREERTOS_UNICORE
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default y
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help
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Also detect if interrupts on CPU 1 are disabled for too long.
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config TASK_WDT
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bool "Task watchdog"
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default y
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help
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This watchdog timer can be used to make sure individual tasks are still running.
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config TASK_WDT_PANIC
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bool "Invoke panic handler when Task Watchdog is triggered"
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depends on TASK_WDT
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default n
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help
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Normally, the Task Watchdog will only print out a warning if it detects it has not
|
|
been fed. If this is enabled, it will invoke the panic handler instead, which
|
|
can then halt or reboot the chip.
|
|
|
|
config TASK_WDT_TIMEOUT_S
|
|
int "Task watchdog timeout (seconds)"
|
|
depends on TASK_WDT
|
|
range 1 60
|
|
default 5
|
|
help
|
|
Timeout for the task WDT, in seconds.
|
|
|
|
config TASK_WDT_CHECK_IDLE_TASK
|
|
bool "Task watchdog watches CPU0 idle task"
|
|
depends on TASK_WDT
|
|
default y
|
|
help
|
|
With this turned on, the task WDT can detect if the idle task is not called within the task
|
|
watchdog timeout period. The idle task not being called usually is a symptom of another
|
|
task hoarding the CPU. It is also a bad thing because FreeRTOS household tasks depend on the
|
|
idle task getting some runtime every now and then. Take Care: With this disabled, this
|
|
watchdog will trigger if no tasks register themselves within the timeout value.
|
|
|
|
config TASK_WDT_CHECK_IDLE_TASK_CPU1
|
|
bool "Task watchdog also watches CPU1 idle task"
|
|
depends on TASK_WDT_CHECK_IDLE_TASK && !FREERTOS_UNICORE
|
|
default y
|
|
help
|
|
Also check the idle task that runs on CPU1.
|
|
|
|
#The brownout detector code is disabled (by making it depend on a nonexisting symbol) because the current revision of ESP32
|
|
#silicon has a bug in the brown-out detector, rendering it unusable for resetting the CPU.
|
|
config BROWNOUT_DET
|
|
bool "Hardware brownout detect & reset"
|
|
default y
|
|
help
|
|
The ESP32 has a built-in brownout detector which can detect if the voltage is lower than
|
|
a specific value. If this happens, it will reset the chip in order to prevent unintended
|
|
behaviour.
|
|
|
|
choice BROWNOUT_DET_LVL_SEL
|
|
prompt "Brownout voltage level"
|
|
depends on BROWNOUT_DET
|
|
default BROWNOUT_DET_LVL_SEL_25
|
|
help
|
|
The brownout detector will reset the chip when the supply voltage is below this level.
|
|
|
|
#The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
|
|
#of the brownout threshold levels.
|
|
config BROWNOUT_DET_LVL_SEL_0
|
|
bool "2.1V"
|
|
config BROWNOUT_DET_LVL_SEL_1
|
|
bool "2.2V"
|
|
config BROWNOUT_DET_LVL_SEL_2
|
|
bool "2.3V"
|
|
config BROWNOUT_DET_LVL_SEL_3
|
|
bool "2.4V"
|
|
config BROWNOUT_DET_LVL_SEL_4
|
|
bool "2.5V"
|
|
config BROWNOUT_DET_LVL_SEL_5
|
|
bool "2.6V"
|
|
config BROWNOUT_DET_LVL_SEL_6
|
|
bool "2.7V"
|
|
config BROWNOUT_DET_LVL_SEL_7
|
|
bool "2.8V"
|
|
endchoice
|
|
|
|
config BROWNOUT_DET_LVL
|
|
int
|
|
default 0 if BROWNOUT_DET_LVL_SEL_0
|
|
default 1 if BROWNOUT_DET_LVL_SEL_1
|
|
default 2 if BROWNOUT_DET_LVL_SEL_2
|
|
default 3 if BROWNOUT_DET_LVL_SEL_3
|
|
default 4 if BROWNOUT_DET_LVL_SEL_4
|
|
default 5 if BROWNOUT_DET_LVL_SEL_5
|
|
default 6 if BROWNOUT_DET_LVL_SEL_6
|
|
default 7 if BROWNOUT_DET_LVL_SEL_7
|
|
|
|
|
|
choice ESP32_TIME_SYSCALL
|
|
prompt "Timers used for gettimeofday function"
|
|
default ESP32_TIME_SYSCALL_USE_RTC_FRC1
|
|
help
|
|
This setting defines which hardware timers are used to
|
|
implement 'gettimeofday' and 'time' functions in C library.
|
|
|
|
- If only FRC1 timer is used, gettimeofday will provide time at
|
|
microsecond resolution. Time will not be preserved when going
|
|
into deep sleep mode.
|
|
- If both FRC1 and RTC timers are used, timekeeping will
|
|
continue in deep sleep. Time will be reported at 1 microsecond
|
|
resolution.
|
|
- If only RTC timer is used, timekeeping will continue in
|
|
deep sleep, but time will be measured at 6.(6) microsecond
|
|
resolution. Also the gettimeofday function itself may take
|
|
longer to run.
|
|
- If no timers are used, gettimeofday and time functions
|
|
return -1 and set errno to ENOSYS.
|
|
- When RTC is used for timekeeping, two RTC_STORE registers are
|
|
used to keep time in deep sleep mode.
|
|
|
|
config ESP32_TIME_SYSCALL_USE_RTC
|
|
bool "RTC"
|
|
config ESP32_TIME_SYSCALL_USE_RTC_FRC1
|
|
bool "RTC and FRC1"
|
|
config ESP32_TIME_SYSCALL_USE_FRC1
|
|
bool "FRC1"
|
|
config ESP32_TIME_SYSCALL_USE_NONE
|
|
bool "None"
|
|
endchoice
|
|
|
|
choice ESP32_RTC_CLOCK_SOURCE
|
|
prompt "RTC clock source"
|
|
default ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
|
|
help
|
|
Choose which clock is used as RTC clock source.
|
|
|
|
config ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
|
|
bool "Internal 150kHz RC oscillator"
|
|
config ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL
|
|
bool "External 32kHz crystal"
|
|
endchoice
|
|
|
|
config ESP32_RTC_CLK_CAL_CYCLES
|
|
int "Number of cycles for RTC_SLOW_CLK calibration"
|
|
default 1024
|
|
range 0 125000
|
|
help
|
|
When the startup code initializes RTC_SLOW_CLK, it can perform
|
|
calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
|
|
frequency. This option sets the number of RTC_SLOW_CLK cycles measured
|
|
by the calibration routine. Higher numbers increase calibration
|
|
precision, which may be important for applications which spend a lot of
|
|
time in deep sleep. Lower numbers reduce startup time.
|
|
|
|
When this option is set to 0, clock calibration will not be performed at
|
|
startup, and approximate clock frequencies will be assumed:
|
|
|
|
- 150000 Hz if internal RC oscillator is used as clock source
|
|
- 32768 Hz if the 32k crystal oscillator is used
|
|
|
|
config ESP32_DEEP_SLEEP_WAKEUP_DELAY
|
|
int "Extra delay in deep sleep wake stub (in us)"
|
|
default 2000
|
|
range 0 5000
|
|
help
|
|
When ESP32 exits deep sleep, the CPU and the flash chip are powered on
|
|
at the same time. CPU will run deep sleep stub first, and then
|
|
proceed to load code from flash. Some flash chips need sufficient
|
|
time to pass between power on and first read operation. By default,
|
|
without any extra delay, this time is approximately 900us, although
|
|
some flash chip types need more than that.
|
|
|
|
By default extra delay is set to 2000us. When optimizing startup time
|
|
for applications which require it, this value may be reduced.
|
|
|
|
If you are seeing "flash read err, 1000" message printed to the
|
|
console after deep sleep reset, try increasing this value.
|
|
|
|
choice ESP32_XTAL_FREQ_SEL
|
|
prompt "Main XTAL frequency"
|
|
default ESP32_XTAL_FREQ_40
|
|
help
|
|
ESP32 currently supports the following XTAL frequencies:
|
|
|
|
- 26 MHz
|
|
- 40 MHz
|
|
|
|
Startup code can automatically estimate XTAL frequency. This feature
|
|
uses the internal 8MHz oscillator as a reference. Because the internal
|
|
oscillator frequency is temperature dependent, it is not recommended
|
|
to use automatic XTAL frequency detection in applications which need
|
|
to work at high ambient temperatures and use high-temperature
|
|
qualified chips and modules.
|
|
config ESP32_XTAL_FREQ_40
|
|
bool "40 MHz"
|
|
config ESP32_XTAL_FREQ_26
|
|
bool "26 MHz"
|
|
config ESP32_XTAL_FREQ_AUTO
|
|
bool "Autodetect"
|
|
endchoice
|
|
|
|
# Keep these values in sync with rtc_xtal_freq_t enum in soc/rtc.h
|
|
config ESP32_XTAL_FREQ
|
|
int
|
|
default 0 if ESP32_XTAL_FREQ_AUTO
|
|
default 40 if ESP32_XTAL_FREQ_40
|
|
default 26 if ESP32_XTAL_FREQ_26
|
|
|
|
config DISABLE_BASIC_ROM_CONSOLE
|
|
bool "Permanently disable BASIC ROM Console"
|
|
default n
|
|
help
|
|
If set, the first time the app boots it will disable the BASIC ROM Console
|
|
permanently (by burning an efuse).
|
|
|
|
Otherwise, the BASIC ROM Console starts on reset if no valid bootloader is
|
|
read from the flash.
|
|
|
|
(Enabling secure boot also disables the BASIC ROM Console by default.)
|
|
|
|
config NO_BLOBS
|
|
bool "No Binary Blobs"
|
|
depends on !BT_ENABLED
|
|
default n
|
|
help
|
|
If enabled, this disables the linking of binary libraries in the application build. Note
|
|
that after enabling this Wi-Fi/Bluetooth will not work.
|
|
|
|
config ESP_TIMER_PROFILING
|
|
bool "Enable esp_timer profiling features"
|
|
depends on MAKING_ESP_TIMER_A_PUBLIC_API
|
|
default n
|
|
help
|
|
If enabled, esp_timer_dump will dump information such as number of times
|
|
the timer was started, number of times the timer has triggered, and the
|
|
total time it took for the callback to run.
|
|
This option has some effect on timer performance and the amount of memory
|
|
used for timer storage, and should only be used for debugging/testing
|
|
purposes.
|
|
|
|
endmenu # ESP32-Specific
|
|
|
|
menu Wi-Fi
|
|
|
|
config SW_COEXIST_ENABLE
|
|
bool "Software controls WiFi/Bluetooth coexistence"
|
|
depends on BT_ENABLED
|
|
default n
|
|
help
|
|
If enabled, WiFi & Bluetooth coexistence is controlled by software rather than hardware.
|
|
Recommended for heavy traffic scenarios. Both coexistence configuration options are
|
|
automatically managed, no user intervention is required.
|
|
|
|
|
|
config ESP32_WIFI_STATIC_RX_BUFFER_NUM
|
|
int "Max number of WiFi static RX buffers"
|
|
range 2 25
|
|
default 10
|
|
help
|
|
Set the number of WiFi static rx buffers. Each buffer takes approximately 1.6KB of RAM.
|
|
The static rx buffers are allocated when esp_wifi_init is called, they are not freed
|
|
until esp_wifi_deinit is called.
|
|
WiFi hardware use these buffers to receive packets, generally larger number for higher
|
|
throughput but more memory, smaller number for lower throughput but less memory.
|
|
|
|
config ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM
|
|
int "Max number of WiFi dynamic RX buffers"
|
|
range 0 128
|
|
default 32
|
|
help
|
|
Set the number of WiFi dynamic rx buffers, 0 means no limitation for dynamic rx buffer
|
|
allocation. The size of dynamic rx buffers is not fixed.
|
|
For each received packet in static rx buffers, WiFi driver makes a copy
|
|
to dynamic rx buffers and then deliver it to high layer stack. The dynamic rx buffer
|
|
is freed when the application, such as socket, successfully received the packet.
|
|
For some applications, the WiFi driver receiving speed is faster than application
|
|
consuming speed, we may run out of memory if no limitation for the dynamic rx buffer
|
|
number. Generally the number of dynamic rx buffer should be no less than static
|
|
rx buffer number if it is not 0.
|
|
|
|
choice ESP32_WIFI_TX_BUFFER
|
|
prompt "Type of WiFi TX buffers"
|
|
default ESP32_WIFI_DYNAMIC_TX_BUFFER
|
|
help
|
|
Select type of WiFi tx buffers and show the submenu with the number of WiFi tx buffers choice.
|
|
If "STATIC" is selected, WiFi tx buffers are allocated when WiFi is initialized and released
|
|
when WiFi is de-initialized. If "DYNAMIC" is selected, WiFi tx buffer is allocated when tx
|
|
data is delivered from LWIP to WiFi and released when tx data is sent out by WiFi.
|
|
The size of each static tx buffers is fixed to about 1.6KB and the size of dynamic tx buffers is
|
|
depend on the length of the data delivered from LWIP.
|
|
If PSRAM is enabled, "STATIC" should be selected to guarantee enough WiFi tx buffers.
|
|
If PSRAM is disabled, "DYNAMIC" should be selected to improve the utilization of RAM.
|
|
|
|
config ESP32_WIFI_STATIC_TX_BUFFER
|
|
bool "STATIC"
|
|
config ESP32_WIFI_DYNAMIC_TX_BUFFER
|
|
bool "DYNAMIC"
|
|
endchoice
|
|
|
|
config ESP32_WIFI_TX_BUFFER_TYPE
|
|
int
|
|
default 0 if ESP32_WIFI_STATIC_TX_BUFFER
|
|
default 1 if ESP32_WIFI_DYNAMIC_TX_BUFFER
|
|
|
|
config ESP32_WIFI_STATIC_TX_BUFFER_NUM
|
|
int "Max number of WiFi static TX buffers"
|
|
depends on ESP32_WIFI_STATIC_TX_BUFFER
|
|
range 16 64
|
|
default 32
|
|
help
|
|
Set the number of WiFi static tx buffers. Each buffer takes approximately 1.6KB of RAM.
|
|
The static rx buffers are allocated when esp_wifi_init is called, they are not released
|
|
until esp_wifi_deinit is called.
|
|
For each tx packet from high layer stack, WiFi driver make a copy of it. For some applications,
|
|
especially the UDP application, the high layer deliver speed is faster than the WiFi tx
|
|
speed, we may run out of static tx buffers.
|
|
|
|
config ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM
|
|
int "Max number of WiFi dynamic TX buffers"
|
|
depends on ESP32_WIFI_DYNAMIC_TX_BUFFER
|
|
range 16 64
|
|
default 32
|
|
help
|
|
Set the number of WiFi dynamic tx buffers, 0 means no limitation for dynamic tx buffer
|
|
allocation. The size of dynamic tx buffers is not fixed.
|
|
For each tx packet from high layer stack, WiFi driver make a copy of it. For some applications,
|
|
especially the UDP application, the high layer deliver speed is faster than the WiFi tx
|
|
speed, we may run out of memory if no limitation for the dynamic tx buffer number.
|
|
|
|
config ESP32_WIFI_AMPDU_ENABLED
|
|
bool "WiFi AMPDU"
|
|
default y
|
|
help
|
|
Select this option to enable AMPDU feature
|
|
|
|
|
|
config ESP32_WIFI_TX_BA_WIN
|
|
int "WiFi AMPDU TX BA window size"
|
|
depends on ESP32_WIFI_AMPDU_ENABLED
|
|
range 2 32
|
|
default 6
|
|
help
|
|
Set the size of WiFi Block Ack TX window. Generally a bigger value means higher throughput but
|
|
more memory. Most of time we should NOT change the default value unless special reason, e.g.
|
|
test the maximum UDP TX throughput with iperf etc. For iperf test in shieldbox, the recommended
|
|
value is 9~12.
|
|
|
|
config ESP32_WIFI_RX_BA_WIN
|
|
int "WiFi AMPDU RX BA window size"
|
|
depends on ESP32_WIFI_AMPDU_ENABLED
|
|
range 2 32
|
|
default 6
|
|
help
|
|
Set the size of WiFi Block Ack RX window. Generally a bigger value means higher throughput but
|
|
more memory. Most of time we should NOT change the default value unless special reason, e.g.
|
|
test the maximum UDP RX throughput with iperf etc. For iperf test in shieldbox, the recommended
|
|
value is 9~12.
|
|
|
|
config ESP32_WIFI_NVS_ENABLED
|
|
bool "WiFi NVS flash"
|
|
default y
|
|
help
|
|
Select this option to enable WiFi NVS flash
|
|
|
|
endmenu # Wi-Fi
|
|
|
|
menu PHY
|
|
|
|
config ESP32_PHY_CALIBRATION_AND_DATA_STORAGE
|
|
bool "Do phy calibration and store calibration data in NVS"
|
|
default y
|
|
help
|
|
If this option is enabled, NVS will be initialized and calibration data will be loaded from there.
|
|
PHY calibration will be skipped on deep sleep wakeup. If calibration data is not found, full calibration
|
|
will be performed and stored in NVS. In all other cases, only partial calibration will be performed.
|
|
|
|
If unsure, choose 'y'.
|
|
|
|
config ESP32_PHY_INIT_DATA_IN_PARTITION
|
|
bool "Use a partition to store PHY init data"
|
|
default n
|
|
help
|
|
If enabled, PHY init data will be loaded from a partition.
|
|
When using a custom partition table, make sure that PHY data
|
|
partition is included (type: 'data', subtype: 'phy').
|
|
With default partition tables, this is done automatically.
|
|
If PHY init data is stored in a partition, it has to be flashed there,
|
|
otherwise runtime error will occur.
|
|
|
|
If this option is not enabled, PHY init data will be embedded
|
|
into the application binary.
|
|
|
|
If unsure, choose 'n'.
|
|
|
|
config ESP32_PHY_MAX_WIFI_TX_POWER
|
|
int "Max WiFi TX power (dBm)"
|
|
range 0 20
|
|
default 20
|
|
help
|
|
Set maximum transmit power for WiFi radio. Actual transmit power for high
|
|
data rates may be lower than this setting.
|
|
|
|
config ESP32_PHY_MAX_TX_POWER
|
|
int
|
|
default ESP32_PHY_MAX_WIFI_TX_POWER
|
|
|
|
endmenu # PHY
|