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https://github.com/espressif/esp-idf.git
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2ed15d8b1e
This commit adds support for ULP RISC-V for esp32s3. Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
49 lines
775 B
Plaintext
49 lines
775 B
Plaintext
/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "sdkconfig.h"
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ENTRY(reset_vector)
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MEMORY
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{
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ram(RW) : ORIGIN = 0, LENGTH = CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM
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}
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SECTIONS
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{
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. = ORIGIN(ram);
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.text :
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{
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*start.S.obj(.text.vectors) /* Default reset vector must link to offset 0x0 */
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*(.text)
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*(.text*)
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} >ram
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.rodata ALIGN(4):
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{
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*(.rodata)
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*(.rodata*)
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} > ram
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.data ALIGN(4):
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{
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*(.data)
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*(.data*)
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*(.sdata)
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*(.sdata*)
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} > ram
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.bss ALIGN(4) :
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{
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*(.bss)
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*(.bss*)
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*(.sbss)
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*(.sbss*)
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} >ram
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__stack_top = ORIGIN(ram) + LENGTH(ram);
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}
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