mirror of
https://github.com/espressif/esp-idf.git
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d33e551f47
This commit removes the GPL license text from various FreeRTOS port files as it no longer matches the licensing of FreeRTOS v10.4.3 which is distributed under the MIT license.
395 lines
14 KiB
C
395 lines
14 KiB
C
/*
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* SPDX-FileCopyrightText: 2020 Amazon.com, Inc. or its affiliates
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*
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* SPDX-License-Identifier: MIT
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*
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* SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD
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*/
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/*
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* FreeRTOS Kernel V10.4.3
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* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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* 1 tab == 4 spaces!
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*/
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/*-----------------------------------------------------------------------
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* Implementation of functions defined in portable.h for the RISC-V port.
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*----------------------------------------------------------------------*/
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#include "sdkconfig.h"
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#include <string.h>
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#include "soc/soc_caps.h"
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#include "soc/periph_defs.h"
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#include "soc/system_reg.h"
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#include "hal/systimer_hal.h"
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#include "hal/systimer_ll.h"
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#include "riscv/rvruntime-frames.h"
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#include "riscv/riscv_interrupts.h"
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#include "riscv/interrupt.h"
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#include "esp_private/crosscore_int.h"
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#include "esp_attr.h"
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#include "esp_system.h"
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#include "esp_intr_alloc.h"
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#include "esp_debug_helpers.h"
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#include "esp_log.h"
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#include "FreeRTOS.h" /* This pulls in portmacro.h */
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#include "task.h"
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#include "portmacro.h"
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#include "port_systick.h"
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_Static_assert(portBYTE_ALIGNMENT == 16, "portBYTE_ALIGNMENT must be set to 16");
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/* ---------------------------------------------------- Variables ------------------------------------------------------
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*
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* ------------------------------------------------------------------------------------------------------------------ */
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static const char *TAG = "cpu_start"; // [refactor-todo]: might be appropriate to change in the future, but
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/**
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* @brief A variable is used to keep track of the critical section nesting.
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* @note This variable has to be stored as part of the task context and must be initialized to a non zero value
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* to ensure interrupts don't inadvertently become unmasked before the scheduler starts.
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* As it is stored as part of the task context it will automatically be set to 0 when the first task is started.
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*/
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static UBaseType_t uxCriticalNesting = 0;
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static UBaseType_t uxSavedInterruptState = 0;
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BaseType_t uxSchedulerRunning = 0;
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UBaseType_t uxInterruptNesting = 0;
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BaseType_t xPortSwitchFlag = 0;
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__attribute__((aligned(16))) static StackType_t xIsrStack[configISR_STACK_SIZE];
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StackType_t *xIsrStackTop = &xIsrStack[0] + (configISR_STACK_SIZE & (~((portPOINTER_SIZE_TYPE)portBYTE_ALIGNMENT_MASK)));
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/* ------------------------------------------------ FreeRTOS Portable --------------------------------------------------
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* - Provides implementation for functions required by FreeRTOS
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* - Declared in portable.h
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* ------------------------------------------------------------------------------------------------------------------ */
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// ----------------- Scheduler Start/End -------------------
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extern void esprv_intc_int_set_threshold(int); // FIXME, this function is in ROM only
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BaseType_t xPortStartScheduler(void)
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{
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uxInterruptNesting = 0;
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uxCriticalNesting = 0;
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uxSchedulerRunning = 0;
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/* Setup the hardware to generate the tick. */
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vPortSetupTimer();
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esprv_intc_int_set_threshold(1); /* set global INTC masking level */
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riscv_global_interrupts_enable();
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vPortYield();
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/*Should not get here*/
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return pdFALSE;
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}
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void vPortEndScheduler(void)
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{
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/* very unlikely this function will be called, so just trap here */
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abort();
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}
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// ------------------------ Stack --------------------------
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__attribute__((noreturn)) static void _prvTaskExitError(void)
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{
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/* A function that implements a task must not exit or attempt to return to
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its caller as there is nothing to return to. If a task wants to exit it
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should instead call vTaskDelete( NULL ).
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Artificially force an assert() to be triggered if configASSERT() is
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defined, then stop here so application writers can catch the error. */
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configASSERT(uxCriticalNesting == ~0UL);
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portDISABLE_INTERRUPTS();
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abort();
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}
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__attribute__((naked)) static void prvTaskExitError(void)
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{
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asm volatile(".option push\n" \
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".option norvc\n" \
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"nop\n" \
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".option pop");
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/* Task entry's RA will point here. Shifting RA into prvTaskExitError is necessary
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to make GDB backtrace ending inside that function.
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Otherwise backtrace will end in the function laying just before prvTaskExitError in address space. */
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_prvTaskExitError();
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}
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StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters)
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{
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extern uint32_t __global_pointer$;
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uint8_t *task_thread_local_start;
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uint8_t *threadptr;
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extern char _thread_local_start, _thread_local_end, _flash_rodata_start;
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/* Byte pointer, so that subsequent calculations don't depend on sizeof(StackType_t). */
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uint8_t *sp = (uint8_t *) pxTopOfStack;
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/* Set up TLS area.
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* The following diagram illustrates the layout of link-time and run-time
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* TLS sections.
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*
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* +-------------+
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* |Section: | Linker symbols:
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* |.flash.rodata| ---------------
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* 0x0+-------------+ <-- _flash_rodata_start
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* ^ | |
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* | | Other data |
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* | | ... |
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* | +-------------+ <-- _thread_local_start
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* | |.tbss | ^
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* v | | |
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* 0xNNNN|int example; | | (thread_local_size)
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* |.tdata | v
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* +-------------+ <-- _thread_local_end
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* | Other data |
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* | ... |
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* | |
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* +-------------+
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*
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* Local variables of
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* pxPortInitialiseStack
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* -----------------------
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* +-------------+ <-- pxTopOfStack
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* |.tdata (*) | ^
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* ^ |int example; | |(thread_local_size
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* | | | |
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* | |.tbss (*) | v
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* | +-------------+ <-- task_thread_local_start
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* 0xNNNN | | | ^
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* | | | |
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* | | | |_thread_local_start - _rodata_start
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* | | | |
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* | | | v
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* v +-------------+ <-- threadptr
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*
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* (*) The stack grows downward!
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*/
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uint32_t thread_local_sz = (uint32_t) (&_thread_local_end - &_thread_local_start);
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thread_local_sz = ALIGNUP(0x10, thread_local_sz);
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sp -= thread_local_sz;
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task_thread_local_start = sp;
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memcpy(task_thread_local_start, &_thread_local_start, thread_local_sz);
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threadptr = task_thread_local_start - (&_thread_local_start - &_flash_rodata_start);
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/* Simulate the stack frame as it would be created by a context switch interrupt. */
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sp -= RV_STK_FRMSZ;
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RvExcFrame *frame = (RvExcFrame *)sp;
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memset(frame, 0, sizeof(*frame));
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/* Shifting RA into prvTaskExitError is necessary to make GDB backtrace ending inside that function.
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Otherwise backtrace will end in the function laying just before prvTaskExitError in address space. */
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frame->ra = (UBaseType_t)prvTaskExitError + 4/*size of the nop insruction at the beginning of prvTaskExitError*/;
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frame->mepc = (UBaseType_t)pxCode;
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frame->a0 = (UBaseType_t)pvParameters;
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frame->gp = (UBaseType_t)&__global_pointer$;
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frame->tp = (UBaseType_t)threadptr;
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configASSERT(((uint32_t) frame & portBYTE_ALIGNMENT_MASK) == 0);
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//TODO: IDF-2393
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return (StackType_t *)frame;
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}
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/* ---------------------------------------------- Port Implementations -------------------------------------------------
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*
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* ------------------------------------------------------------------------------------------------------------------ */
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// --------------------- Interrupts ------------------------
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BaseType_t xPortInIsrContext(void)
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{
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return uxInterruptNesting;
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}
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BaseType_t IRAM_ATTR xPortInterruptedFromISRContext(void)
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{
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/* For single core, this can be the same as xPortInIsrContext() because reading it is atomic */
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return uxInterruptNesting;
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}
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// ---------------------- Spinlocks ------------------------
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// ------------------ Critical Sections --------------------
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void vPortEnterCritical(void)
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{
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BaseType_t state = portSET_INTERRUPT_MASK_FROM_ISR();
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uxCriticalNesting++;
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if (uxCriticalNesting == 1) {
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uxSavedInterruptState = state;
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}
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}
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void vPortExitCritical(void)
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{
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if (uxCriticalNesting > 0) {
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uxCriticalNesting--;
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if (uxCriticalNesting == 0) {
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portCLEAR_INTERRUPT_MASK_FROM_ISR(uxSavedInterruptState);
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}
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}
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}
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// ---------------------- Yielding -------------------------
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int vPortSetInterruptMask(void)
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{
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int ret;
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unsigned old_mstatus = RV_CLEAR_CSR(mstatus, MSTATUS_MIE);
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ret = REG_READ(INTERRUPT_CORE0_CPU_INT_THRESH_REG);
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REG_WRITE(INTERRUPT_CORE0_CPU_INT_THRESH_REG, RVHAL_EXCM_LEVEL);
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RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE);
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/**
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* In theory, this function should not return immediately as there is a
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* delay between the moment we mask the interrupt threshold register and
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* the moment a potential lower-priority interrupt is triggered (as said
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* above), it should have a delay of 2 machine cycles/instructions.
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*
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* However, in practice, this function has an epilogue of one instruction,
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* thus the instruction masking the interrupt threshold register is
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* followed by two instructions: `ret` and `csrrs` (RV_SET_CSR).
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* That's why we don't need any additional nop instructions here.
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*/
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return ret;
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}
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void vPortClearInterruptMask(int mask)
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{
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REG_WRITE(INTERRUPT_CORE0_CPU_INT_THRESH_REG, mask);
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/**
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* The delay between the moment we unmask the interrupt threshold register
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* and the moment the potential requested interrupt is triggered is not
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* null: up to three machine cycles/instructions can be executed.
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*
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* When compilation size optimization is enabled, this function and its
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* callers returning void will have NO epilogue, thus the instruction
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* following these calls will be executed.
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*
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* If the requested interrupt is a context switch to a higher priority
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* task then the one currently running, we MUST NOT execute any instruction
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* before the interrupt effectively happens.
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* In order to prevent this, force this routine to have a 3-instruction
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* delay before exiting.
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*/
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asm volatile ( "nop" );
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asm volatile ( "nop" );
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asm volatile ( "nop" );
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}
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void vPortYield(void)
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{
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if (uxInterruptNesting) {
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vPortYieldFromISR();
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} else {
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esp_crosscore_int_send_yield(0);
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/* There are 3-4 instructions of latency between triggering the software
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interrupt and the CPU interrupt happening. Make sure it happened before
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we return, otherwise vTaskDelay() may return and execute 1-2
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instructions before the delay actually happens.
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(We could use the WFI instruction here, but there is a chance that
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the interrupt will happen while evaluating the other two conditions
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for an instant yield, and if that happens then the WFI would be
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waiting for the next interrupt to occur...)
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*/
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while (uxSchedulerRunning && uxCriticalNesting == 0 && REG_READ(SYSTEM_CPU_INTR_FROM_CPU_0_REG) != 0) {}
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}
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}
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void vPortYieldFromISR( void )
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{
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traceISR_EXIT_TO_SCHEDULER();
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uxSchedulerRunning = 1;
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xPortSwitchFlag = 1;
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}
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void vPortYieldOtherCore(BaseType_t coreid)
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{
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esp_crosscore_int_send_yield(coreid);
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}
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// ------------------- Hook Functions ----------------------
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void __attribute__((weak)) vApplicationStackOverflowHook(TaskHandle_t xTask, char *pcTaskName)
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{
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#define ERR_STR1 "***ERROR*** A stack overflow in task "
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#define ERR_STR2 " has been detected."
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const char *str[] = {ERR_STR1, pcTaskName, ERR_STR2};
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char buf[sizeof(ERR_STR1) + CONFIG_FREERTOS_MAX_TASK_NAME_LEN + sizeof(ERR_STR2) + 1 /* null char */] = {0};
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char *dest = buf;
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for (int i = 0; i < sizeof(str) / sizeof(str[0]); i++) {
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dest = strcat(dest, str[i]);
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}
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esp_system_abort(buf);
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}
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// ----------------------- System --------------------------
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uint32_t xPortGetTickRateHz(void)
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{
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return (uint32_t)configTICK_RATE_HZ;
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}
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#define STACK_WATCH_AREA_SIZE 32
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#define STACK_WATCH_POINT_NUMBER (SOC_CPU_WATCHPOINTS_NUM - 1)
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void vPortSetStackWatchpoint(void *pxStackStart)
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{
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uint32_t addr = (uint32_t)pxStackStart;
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addr = (addr + (STACK_WATCH_AREA_SIZE - 1)) & (~(STACK_WATCH_AREA_SIZE - 1));
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esp_cpu_set_watchpoint(STACK_WATCH_POINT_NUMBER, (char *)addr, STACK_WATCH_AREA_SIZE, ESP_WATCHPOINT_STORE);
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}
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/* ---------------------------------------------- Misc Implementations -------------------------------------------------
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*
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* ------------------------------------------------------------------------------------------------------------------ */
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// --------------------- App Start-up ----------------------
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/* [refactor-todo]: See if we can include this through a header */
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extern void esp_startup_start_app_common(void);
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void esp_startup_start_app(void)
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{
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esp_startup_start_app_common();
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ESP_LOGI(TAG, "Starting scheduler.");
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vTaskStartScheduler();
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}
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