esp-idf/examples/peripherals/spi_master/hd_eeprom/components/eeprom/linker.lf

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# This example supports running on the SPI1 bus, which is shared with SPI flash accessed by the
# cache. When doing transaction on SPI1 bus, data cannot be fetched from the flash, so all the data
# used during this time should be put into the internal RAM.
[mapping:eeprom]
archive: libeeprom.a
entries:
if EXAMPLE_USE_SPI1_PINS = y:
* (noflash)
[mapping:ext_driver]
archive: libesp_driver_gpio.a
entries:
if EXAMPLE_USE_SPI1_PINS = y:
gpio: gpio_intr_enable (noflash)
[mapping:ext_soc]
archive: libhal.a
entries:
if EXAMPLE_USE_SPI1_PINS = y:
gpio_hal: gpio_hal_intr_enable_on_core (noflash)
[mapping:ext_newlib]
archive: libnewlib.a
entries:
if EXAMPLE_USE_SPI1_PINS = y:
time:usleep (noflash)