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d0b7f3214a
GDMA trigger actually is not assigned to UART controller, but for UHCI controller
17 lines
530 B
C
17 lines
530 B
C
/*
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* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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// The following macros have a format SOC_[periph][instance_id] to make it work with `GDMA_MAKE_TRIGGER`
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#define SOC_GDMA_TRIG_PERIPH_M2M0 (-1)
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#define SOC_GDMA_TRIG_PERIPH_SPI2 (0)
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#define SOC_GDMA_TRIG_PERIPH_UHCI0 (2)
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#define SOC_GDMA_TRIG_PERIPH_I2S0 (3)
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#define SOC_GDMA_TRIG_PERIPH_AES0 (6)
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#define SOC_GDMA_TRIG_PERIPH_SHA0 (7)
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#define SOC_GDMA_TRIG_PERIPH_ADC0 (8)
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