mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
233 lines
6.1 KiB
C
233 lines
6.1 KiB
C
/*
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include <stdbool.h>
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#include "soc/efuse_periph.h"
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#include "hal/assert.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define ESP_EFUSE_BLOCK_ERROR_BITS(error_reg, block) ((error_reg) & (0x0F << (4 * (block))))
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// Always inline these functions even no gcc optimization is applied.
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/******************* eFuse fields *************************/
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_flash_crypt_cnt(void)
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{
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return EFUSE.blk0_rdata0.rd_flash_crypt_cnt;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_mac0(void)
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{
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return EFUSE.blk0_rdata1.rd_mac;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_mac1(void)
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{
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return EFUSE.blk0_rdata2.rd_mac_1;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_secure_boot_v1_en(void)
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{
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return EFUSE.blk0_rdata6.rd_abs_done_0;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_secure_boot_v2_en(void)
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{
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return EFUSE.blk0_rdata6.rd_abs_done_1;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_sdio_force(void)
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{
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return EFUSE.blk0_rdata4.rd_xpd_sdio_force;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_xpd_sdio(void)
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{
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return EFUSE.blk0_rdata4.rd_xpd_sdio_reg;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_sdio_tieh(void)
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{
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return EFUSE.blk0_rdata4.rd_xpd_sdio_tieh;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_sdio_drefh(void)
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{
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return (EFUSE.blk0_rdata4.val >> 8) & 0x3;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_sdio_drefm(void)
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{
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return (EFUSE.blk0_rdata4.val >> 10) & 0x3;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_sdio_drefl(void)
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{
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return (EFUSE.blk0_rdata4.val >> 12) & 0x3;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_blk3_part_reserve(void)
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{
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return EFUSE.blk0_rdata3.rd_blk3_part_reserve;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_chip_cpu_freq_rated(void)
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{
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return EFUSE.blk0_rdata3.rd_chip_cpu_freq_rated;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_chip_cpu_freq_low(void)
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{
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return EFUSE.blk0_rdata3.rd_chip_cpu_freq_low;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_ver_pkg(void)
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{
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return (EFUSE.blk0_rdata3.rd_chip_package_4bit << 3) | EFUSE.blk0_rdata3.rd_chip_package;
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}
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// use efuse_hal_get_major_chip_version() to get full major chip version
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__attribute__((always_inline)) static inline bool efuse_ll_get_chip_ver_rev1(void)
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{
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return EFUSE.blk0_rdata3.rd_chip_ver_rev1;
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}
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// use efuse_hal_get_major_chip_version() to get full major chip version
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__attribute__((always_inline)) static inline bool efuse_ll_get_chip_ver_rev2(void)
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{
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return EFUSE.blk0_rdata5.rd_chip_ver_rev2;
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}
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// use efuse_hal_get_minor_chip_version() to get minor chip version
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_wafer_version_minor(void)
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{
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return EFUSE.blk0_rdata5.rd_wafer_version_minor;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_disable_wafer_version_major(void)
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{
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return false;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_blk_version_major(void)
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{
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return 0;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_blk_version_minor(void)
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{
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return 0;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_coding_scheme(void)
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{
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return EFUSE.blk0_rdata6.rd_coding_scheme;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_disable_app_cpu(void)
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{
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return EFUSE.blk0_rdata3.rd_disable_app_cpu;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_disable_bt(void)
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{
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return EFUSE.blk0_rdata3.rd_disable_bt;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_vol_level_hp_inv(void)
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{
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return EFUSE.blk0_rdata5.rd_vol_level_hp_inv;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_adc_vref(void)
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{
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return EFUSE.blk0_rdata4.rd_adc_vref;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_adc1_tp_low(void)
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{
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return EFUSE.blk3_rdata3.rd_adc1_tp_low;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_adc2_tp_low(void)
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{
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return EFUSE.blk3_rdata3.rd_adc2_tp_low;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_adc1_tp_high(void)
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{
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return EFUSE.blk3_rdata3.rd_adc1_tp_high;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_adc2_tp_high(void)
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{
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return EFUSE.blk3_rdata3.rd_adc2_tp_high;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_dec_warnings(unsigned block)
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{
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if (block == 0 || block > 4) {
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return false;
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}
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uint32_t error_reg = EFUSE.dec_status.dec_warnings;
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return ESP_EFUSE_BLOCK_ERROR_BITS(error_reg, block - 1) != 0;
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}
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/******************* eFuse control functions *************************/
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__attribute__((always_inline)) static inline bool efuse_ll_get_cmd(void)
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{
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return EFUSE.cmd.val;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_read_cmd(void)
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{
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EFUSE.cmd.read_cmd = 1;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(void)
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{
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EFUSE.cmd.pgm_cmd = 1;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void)
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{
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EFUSE.conf.op_code = EFUSE_READ_OP_CODE;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void)
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{
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EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_div(uint32_t value)
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{
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EFUSE.dac_conf.dac_clk_div = value;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_sel0(uint32_t value)
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{
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EFUSE.clk.clk_sel0 = value;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_sel1(uint32_t value)
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{
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EFUSE.clk.clk_sel1 = value;
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}
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/******************* eFuse control functions *************************/
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#ifdef __cplusplus
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}
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#endif
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