mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
874a720286
update all struct headers to be more "standardized": - bit fields are properly wrapped with struct - bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits - bit field should be uint32_t - typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199 added helper macros to force peripheral registers being accessed in 32 bitwidth added a check script into ci
374 lines
11 KiB
C
374 lines
11 KiB
C
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*******************************************************************************
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* NOTICE
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* The ll is not public api, don't use in application code.
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* See readme.md in hal/include/hal/readme.md
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******************************************************************************/
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#pragma once
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#include <stdlib.h>
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#include "soc/rtc_io_periph.h"
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#include "soc/rtc_io_struct.h"
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#include "soc/sens_struct.h"
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#include "hal/rtc_io_types.h"
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#include "hal/gpio_types.h"
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#define RTCIO_LL_PIN_FUNC 0
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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RTCIO_FUNC_RTC = 0x0, /*!< The pin controled by RTC module. */
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RTCIO_FUNC_DIGITAL = 0x1, /*!< The pin controlled by DIGITAL module. */
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} rtcio_ll_func_t;
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typedef enum {
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RTCIO_WAKEUP_DISABLE = 0, /*!< Disable GPIO interrupt */
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RTCIO_WAKEUP_LOW_LEVEL = 0x4, /*!< GPIO interrupt type : input low level trigger */
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RTCIO_WAKEUP_HIGH_LEVEL = 0x5, /*!< GPIO interrupt type : input high level trigger */
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} rtcio_ll_wake_type_t;
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typedef enum {
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RTCIO_OUTPUT_NORMAL = 0, /*!< RTCIO output mode is normal. */
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RTCIO_OUTPUT_OD = 0x1, /*!< RTCIO output mode is open-drain. */
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} rtcio_ll_out_mode_t;
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/**
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* @brief Select the rtcio function.
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*
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* @note The RTC function must be selected before the pad analog function is enabled.
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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* @param func Select pin function.
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*/
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static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func)
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{
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if (func == RTCIO_FUNC_RTC) {
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SENS.sar_io_mux_conf.iomux_clk_gate_en = 1;
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// 0: GPIO connected to digital GPIO module. 1: GPIO connected to analog RTC module.
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SET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, (rtc_io_desc[rtcio_num].mux));
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//0:RTC FUNCTION 1,2,3:Reserved
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SET_PERI_REG_BITS(rtc_io_desc[rtcio_num].reg, RTC_IO_TOUCH_PAD1_FUN_SEL_V, RTCIO_LL_PIN_FUNC, rtc_io_desc[rtcio_num].func);
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} else if (func == RTCIO_FUNC_DIGITAL) {
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CLEAR_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, (rtc_io_desc[rtcio_num].mux));
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SENS.sar_io_mux_conf.iomux_clk_gate_en = 0;
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}
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}
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/**
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* Enable rtcio output.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_output_enable(int rtcio_num)
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{
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RTCIO.enable_w1ts.w1ts = (1U << rtcio_num);
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}
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/**
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* Disable rtcio output.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_output_disable(int rtcio_num)
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{
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RTCIO.enable_w1tc.w1tc = (1U << rtcio_num);
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}
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/**
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* Set RTCIO output level.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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* @param level 0: output low; ~0: output high.
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*/
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static inline void rtcio_ll_set_level(int rtcio_num, uint32_t level)
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{
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if (level) {
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RTCIO.out_w1ts.w1ts = (1U << rtcio_num);
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} else {
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RTCIO.out_w1tc.w1tc = (1U << rtcio_num);
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}
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}
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/**
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* Enable rtcio input.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_input_enable(int rtcio_num)
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{
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SET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].ie);
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}
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/**
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* Disable rtcio input.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_input_disable(int rtcio_num)
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{
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CLEAR_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].ie);
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}
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/**
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* Get RTCIO input level.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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* @return 0: input low; ~0: input high.
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*/
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static inline uint32_t rtcio_ll_get_level(int rtcio_num)
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{
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return (uint32_t)(RTCIO.in_val.in >> rtcio_num) & 0x1;
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}
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/**
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* @brief Set RTC GPIO pad drive capability
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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* @param strength Drive capability of the pad. Range: 0 ~ 3.
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*/
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static inline void rtcio_ll_set_drive_capability(int rtcio_num, uint32_t strength)
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{
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if (rtc_io_desc[rtcio_num].drv_v) {
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SET_PERI_REG_BITS(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].drv_v, strength, rtc_io_desc[rtcio_num].drv_s);
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}
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}
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/**
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* @brief Get RTC GPIO pad drive capability.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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* @return Drive capability of the pad. Range: 0 ~ 3.
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*/
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static inline uint32_t rtcio_ll_get_drive_capability(int rtcio_num)
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{
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return GET_PERI_REG_BITS2(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].drv_v, rtc_io_desc[rtcio_num].drv_s);
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}
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/**
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* @brief Set RTC GPIO pad output mode.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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* @return mode Output mode.
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*/
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static inline void rtcio_ll_output_mode_set(int rtcio_num, rtcio_ll_out_mode_t mode)
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{
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RTCIO.pin[rtcio_num].pad_driver = mode;
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}
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/**
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* RTC GPIO pullup enable.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_pullup_enable(int rtcio_num)
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{
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if (rtc_io_desc[rtcio_num].pullup) {
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SET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].pullup);
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}
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}
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/**
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* RTC GPIO pullup disable.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_pullup_disable(int rtcio_num)
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{
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if (rtc_io_desc[rtcio_num].pullup) {
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CLEAR_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].pullup);
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}
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}
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/**
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* RTC GPIO pulldown enable.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_pulldown_enable(int rtcio_num)
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{
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if (rtc_io_desc[rtcio_num].pulldown) {
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SET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].pulldown);
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}
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}
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/**
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* RTC GPIO pulldown disable.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_pulldown_disable(int rtcio_num)
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{
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if (rtc_io_desc[rtcio_num].pulldown) {
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CLEAR_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].pulldown);
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}
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}
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/**
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* Enable force hold function for RTC IO pad.
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*
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* Enabling HOLD function will cause the pad to lock current status, such as,
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* input/output enable, input/output value, function, drive strength values.
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* This function is useful when going into light or deep sleep mode to prevent
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* the pin configuration from changing.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_force_hold_enable(int rtcio_num)
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{
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SET_PERI_REG_MASK(RTC_CNTL_PAD_HOLD_REG, rtc_io_desc[rtcio_num].hold_force);
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}
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/**
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* Disable hold function on an RTC IO pad
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*
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* @note If disable the pad hold, the status of pad maybe changed in sleep mode.
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_force_hold_disable(int rtcio_num)
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{
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CLEAR_PERI_REG_MASK(RTC_CNTL_PAD_HOLD_REG, rtc_io_desc[rtcio_num].hold_force);
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}
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/**
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* Enable force hold function for RTC IO pad.
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*
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* Enabling HOLD function will cause the pad to lock current status, such as,
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* input/output enable, input/output value, function, drive strength values.
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* This function is useful when going into light or deep sleep mode to prevent
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* the pin configuration from changing.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_force_hold_all(void)
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{
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SET_PERI_REG_MASK(RTC_CNTL_PWC_REG, RTC_CNTL_PAD_FORCE_HOLD_M);
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}
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/**
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* Disable hold function on an RTC IO pad
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*
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* @note If disable the pad hold, the status of pad maybe changed in sleep mode.
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_force_unhold_all(void)
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{
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CLEAR_PERI_REG_MASK(RTC_CNTL_PWC_REG, RTC_CNTL_PAD_FORCE_HOLD_M);
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}
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/**
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* Enable wakeup function and set wakeup type from light sleep status for rtcio.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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* @param type Wakeup on high level or low level.
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*/
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static inline void rtcio_ll_wakeup_enable(int rtcio_num, rtcio_ll_wake_type_t type)
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{
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SENS.sar_io_mux_conf.iomux_clk_gate_en = 1;
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RTCIO.pin[rtcio_num].wakeup_enable = 0x1;
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RTCIO.pin[rtcio_num].int_type = type;
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}
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/**
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* Disable wakeup function from light sleep status for rtcio.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_wakeup_disable(int rtcio_num)
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{
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SENS.sar_io_mux_conf.iomux_clk_gate_en = 0;
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RTCIO.pin[rtcio_num].wakeup_enable = 0;
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RTCIO.pin[rtcio_num].int_type = RTCIO_WAKEUP_DISABLE;
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}
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/**
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* Enable rtc io output in deep sleep.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_enable_output_in_sleep(gpio_num_t gpio_num)
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{
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if (rtc_io_desc[gpio_num].slpoe) {
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SET_PERI_REG_MASK(rtc_io_desc[gpio_num].reg, rtc_io_desc[gpio_num].slpoe);
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}
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}
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/**
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* Disable rtc io output in deep sleep.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_in_sleep_disable_output(gpio_num_t gpio_num)
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{
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if (rtc_io_desc[gpio_num].slpoe) {
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CLEAR_PERI_REG_MASK(rtc_io_desc[gpio_num].reg, rtc_io_desc[gpio_num].slpoe);
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}
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}
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/**
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* Enable rtc io input in deep sleep.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_in_sleep_enable_input(gpio_num_t gpio_num)
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{
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SET_PERI_REG_MASK(rtc_io_desc[gpio_num].reg, rtc_io_desc[gpio_num].slpie);
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}
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/**
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* Disable rtc io input in deep sleep.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_in_sleep_disable_input(gpio_num_t gpio_num)
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{
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CLEAR_PERI_REG_MASK(rtc_io_desc[gpio_num].reg, rtc_io_desc[gpio_num].slpie);
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}
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/**
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* Enable rtc io keep another setting in deep sleep.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_enable_sleep_setting(gpio_num_t gpio_num)
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{
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SET_PERI_REG_MASK(rtc_io_desc[gpio_num].reg, rtc_io_desc[gpio_num].slpsel);
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}
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/**
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* Disable rtc io keep another setting in deep sleep. (Default)
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_disable_sleep_setting(gpio_num_t gpio_num)
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{
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CLEAR_PERI_REG_MASK(rtc_io_desc[gpio_num].reg, rtc_io_desc[gpio_num].slpsel);
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}
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static inline void rtcio_ll_ext0_set_wakeup_pin(int rtcio_num, int level)
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{
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REG_SET_FIELD(RTC_IO_EXT_WAKEUP0_REG, RTC_IO_EXT_WAKEUP0_SEL, rtcio_num);
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// Set level which will trigger wakeup
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SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
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level , RTC_CNTL_EXT_WAKEUP0_LV_S);
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}
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#ifdef __cplusplus
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}
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#endif
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