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167 lines
4.0 KiB
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167 lines
4.0 KiB
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***********************
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Chip Series Comparison
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***********************
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The comparison below covers key features of chips supported by ESP-IDF. For the full list of features please refer to respective datasheets in Section `Related Documents`_.
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.. list-table:: Chip Series Comparison
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:widths: 20 40 40
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:header-rows: 1
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* - Feature
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- ESP32 Series
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- ESP32-S2 Series
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* - Launch year
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- 2016
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- 2020
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* - Variants
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- ESP32-D0WDQ6, ESP32-D0WD, ESP32-D2WD, ESP32-S0WD, ESP32-U4WDH, ESP32-PICO
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- ESP32-S2, ESP32-S2FH2, ESP32-S2FH4
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* - Core
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- Xtensa® dual-core 32-bit LX6 with 600 MIPS (in total); 200 MIPS for ESP32-U4WDH/ESP32-S0WD (single-core variants); 400 MIPS for ESP32-D2WD
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- Xtensa® single-core 32-bit LX7 with 300 MIPS
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* - Wi-Fi protocols
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- 802.11 b/g/n, 2.4 GHz
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- 802.11 b/g/n, 2.4 GHz
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* - Bluetooth®
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- Bluetooth 5.0 and Bluetooth LE
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- ✖️
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* - Typical frequency
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- 240 MHz (160 MHz for ESP32-S0WD, ESP32-D2WD, and ESP32-U4WDH)
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- 240 MHz
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* - SRAM
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- 520 KB
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- 320 KB
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* - ROM
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- 448 KB of ROM for booting and core functions
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- 128 KB of ROM for booting and core functions
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* - Flash
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- Up to 16 MB device, address 11 MB + 248 KB each time
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- Up to 1 GB device, address 11.5 MB each time
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* - PSRAM
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- Up to 16 MB device, address 4 MB each time
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- Up to 1 GB device, address 11.5 MB each time
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* - Cache
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- ✔️
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- ✔️ More functionalities, more modes
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* - **Peripherals**
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-
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-
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* - ADC
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- Two 12-bit, 18 channels
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- Two 13-bit, 20 channels
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* - Temperature sensor
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- ✖️
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- 1
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* - Touch sensor
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- 10
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- 14
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* - Hall sensor
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- 1
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- ✖️
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* - GPIO
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- 34
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- 43
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* - SPI
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- 4
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- 4 with more modes
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* - LCD interface
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- 1
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- 1
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* - UART
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- 3
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- 2 :sup:`1`
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* - I2C
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- 2
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- 2
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* - I2S
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- 2
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- 1 :sup:`1`
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* - Camera interface
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- 1
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- 1
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* - RMT
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- 8 channels
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- 4 channels :sup:`1`
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* - Pulse counter
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- 8 channels
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- 4 channels :sup:`1`
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* - LED PWM
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- 16 channels
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- 8 channels :sup:`1`
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* - USB OTG
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- ✖️
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- 1
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* - TWAI
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- 1
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- 1
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* - SD/SDIO/MMC host controller
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- 1
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- ✖️
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* - SDIO slave controller
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- 1
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- ✖️
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* - Ethernet MAC
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- 1
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- ✖️
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* - ULP
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- ULP FSM
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- PicoRV32 core with 8 KB SRAM, ULP FSM with more instructions
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* - **Security**
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-
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-
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* - Secure boot
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- ✔️
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- ✔️ Faster and safer
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* - Flash encryption
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- ✔️
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- ✔️ More functionalities (support for PSRAM encryption)
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* - OTP
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- 1024-bit
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- 4096-bit
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* - AES
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- ✔️
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- ✔️ DMA support for ECB, CBC, OFB, CTR, CFB8, CFB128 and GCM
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* - HASH
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- SHA-1, SHA-2
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- SHA-1, SHA-2; DMA support
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* - RSA
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- Up to 4096 bits
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- Up to 4096 bits, improved acceleration options
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* - RNG
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- ✔️
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- ✔️
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* - HMAC
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- ✖️
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- ✔️
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* - Digital signature
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- ✖️
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- ✔️
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* - XTS
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- ✖️
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- ✔️
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* - **Other**
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-
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-
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* - Deep-sleep (ULP sensor-monitored pattern)
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- 100 μA (when ADC work with a duty cycle of 1%)
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- 22 μA (when touch sensors work with a duty cycle of 1%)
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* - Size
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- QFN 5*5, 6*6
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- QFN 7*7
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**Note** 1: Reduced chip area
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Related Documents
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=================
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- `ESP32 Datasheet (PDF) <https://espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf>`_
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- ESP32-PICO Datasheets (PDF)
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- `ESP32-PICO-D4 <https://www.espressif.com/sites/default/files/documentation/esp32-pico-d4_datasheet_en.pdf>`_
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- `ESP32-PICO-V3 <https://www.espressif.com/sites/default/files/documentation/esp32-pico-v3_datasheet_en.pdf>`_
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- `ESP32-PICO-V3-02 <https://www.espressif.com/sites/default/files/documentation/esp32-pico-v3-02_datasheet_en.pdf>`_
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- `ESP32-S2 Datasheet (PDF) <https://www.espressif.com/sites/default/files/documentation/esp32-s2_datasheet_en.pdf>`_
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