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9a6de4cb3e
On riscv chips accessing cache mapped memory regions over the ibus would result in an illegal instructions exception triggering faster than the cache error interrupt/exception. Added a cache error check in the panic handler, if any cache errors are active the panic handler will now report a cache error, even if the trigger exception was a illegal instructions.
55 lines
1.7 KiB
C
55 lines
1.7 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "riscv/rvruntime-frames.h"
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#include "esp_private/panic_internal.h"
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#include "esp_private/panic_reason.h"
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extern void esp_panic_handler(panic_info_t *info);
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volatile bool g_override_illegal_instruction = false;
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void __real_esp_panic_handler(panic_info_t *info);
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void __real_esp_cpu_stall(int core_id);
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void return_from_panic_handler(RvExcFrame *frm) __attribute__((noreturn));
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/* Memprot test specific IllegalInstruction exception handler:
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* when testing the protection against a code execution, sample code
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* is being injected into various memory regions which produces
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* Illegal instruction on execution attempt. Such a result is expected
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* but it causes system reboot in the standard panic handler.
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* The following variant of panic handling simply returns back to the
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* next instruction and continues normal execution.
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*
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* NOTE: if Illegal instruction comes from a different source than the testing code
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* the behavior is undefined
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* */
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void __wrap_esp_panic_handler(panic_info_t *info)
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{
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RvExcFrame *frm = (RvExcFrame *)info->frame;
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if ( frm->mcause == MCAUSE_ILLEGAL_INSTRUCTION && g_override_illegal_instruction == true ) {
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/* Return from exception to the return address that called the faulting function.
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*/
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frm->mepc = frm->ra;
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/* Restore the CPU state and return from the exception.
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*/
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return_from_panic_handler(frm);
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} else {
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__real_esp_panic_handler(info);
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}
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}
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void __wrap_esp_cpu_stall(int core_id)
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{
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if ( g_override_illegal_instruction == true ) {
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return;
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} else {
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__real_esp_cpu_stall(core_id);
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}
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}
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