mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
3abdd2207d
check master read write functions with array of registers) fix master serial processing code and modbus controller to work with register array modbus_master: add reading and writing of test value array (58 registers) to check failure is gone remove parameter temporary buffer from modbus controller to allow more than 24 byte writes driver: fix issue with TOUT feature driver: fix uart_rx_timeout issue driver: fix issue with rxfifo_tout_int_raw not triggered when received fifo_len = 120 byte and all bytes read out of fifo as result of rxfifo_full_int_raw driver: add function uart_internal_set_always_rx_timeout() to always handle tout interrupt examples: call uart_internal_set_always_rx_timeout() to handle tout interrupt correctly examples: update examples to use tout feature driver: reflect changes of uart_set_always_rx_timeout() function, change uart.c driver: change conditions to trigger workaround for tout feature in uart.c driver: change uart_set_always_rx_timeout() freemodbus: fix tabs, remove commented code driver: remove uart_ll_is_rx_idle()
94 lines
2.9 KiB
C
94 lines
2.9 KiB
C
/* Copyright 2018 Espressif Systems (Shanghai) PTE LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef PORT_COMMON_H_
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#define PORT_COMMON_H_
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#include "freertos/FreeRTOS.h"
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#include "freertos/xtensa_api.h"
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#include "esp_log.h" // for ESP_LOGE macro
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#include "sdkconfig.h"
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#define INLINE inline
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#define PR_BEGIN_EXTERN_C extern "C" {
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#define PR_END_EXTERN_C }
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#define MB_PORT_TAG "MB_PORT_COMMON"
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#define MB_BAUD_RATE_DEFAULT (115200)
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#define MB_QUEUE_LENGTH (CONFIG_FMB_QUEUE_LENGTH)
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#define MB_SERIAL_TASK_PRIO (CONFIG_FMB_SERIAL_TASK_PRIO)
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#define MB_SERIAL_TASK_STACK_SIZE (CONFIG_FMB_SERIAL_TASK_STACK_SIZE)
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#define MB_SERIAL_TOUT (3) // 3.5*8 = 28 ticks, TOUT=3 -> ~24..33 ticks
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// Set buffer size for transmission
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#define MB_SERIAL_BUF_SIZE (CONFIG_FMB_SERIAL_BUF_SIZE)
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// common definitions for serial port implementations
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#define MB_SERIAL_TX_TOUT_MS (100)
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#define MB_SERIAL_TX_TOUT_TICKS pdMS_TO_TICKS(MB_SERIAL_TX_TOUT_MS) // timeout for transmission
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#define MB_SERIAL_RX_TOUT_MS (1)
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#define MB_SERIAL_RX_TOUT_TICKS pdMS_TO_TICKS(MB_SERIAL_RX_TOUT_MS) // timeout for receive
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#define MB_SERIAL_RESP_LEN_MIN (4)
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#define MB_PORT_CHECK(a, ret_val, str, ...) \
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if (!(a)) { \
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ESP_LOGE(MB_PORT_TAG, "%s(%u): " str, __FUNCTION__, __LINE__, ##__VA_ARGS__); \
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return ret_val; \
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}
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#ifdef __cplusplus
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PR_BEGIN_EXTERN_C
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#endif /* __cplusplus */
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#ifndef TRUE
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#define TRUE 1
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#endif
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#ifndef FALSE
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#define FALSE 0
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#endif
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typedef char BOOL;
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typedef unsigned char UCHAR;
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typedef char CHAR;
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typedef unsigned short USHORT;
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typedef short SHORT;
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typedef unsigned long ULONG;
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typedef long LONG;
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void vMBPortEnterCritical(void);
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void vMBPortExitCritical(void);
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#define ENTER_CRITICAL_SECTION( ) { ESP_LOGD(MB_PORT_TAG,"%s: Port enter critical.", __func__); \
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vMBPortEnterCritical(); }
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#define EXIT_CRITICAL_SECTION( ) { vMBPortExitCritical(); \
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ESP_LOGD(MB_PORT_TAG,"%s: Port exit critical", __func__); }
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#define MB_PORT_CHECK_EVENT( event, mask ) ( event & mask )
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#define MB_PORT_CLEAR_EVENT( event, mask ) do { event &= ~mask; } while(0)
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#ifdef __cplusplus
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PR_END_EXTERN_C
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#endif /* __cplusplus */
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#endif /* PORT_COMMON_H_ */
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