mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
240 lines
9.4 KiB
Plaintext
240 lines
9.4 KiB
Plaintext
menu "ESP32C3-Specific"
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visible if IDF_TARGET_ESP32C3
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choice ESP32C3_DEFAULT_CPU_FREQ_MHZ
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prompt "CPU frequency"
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default ESP32C3_DEFAULT_CPU_FREQ_40 if IDF_ENV_FPGA
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default ESP32C3_DEFAULT_CPU_FREQ_160 if !IDF_ENV_FPGA
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help
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CPU frequency to be set on application startup.
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config ESP32C3_DEFAULT_CPU_FREQ_40
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bool "40 MHz"
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depends on IDF_ENV_FPGA
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config ESP32C3_DEFAULT_CPU_FREQ_80
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bool "80 MHz"
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config ESP32C3_DEFAULT_CPU_FREQ_160
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bool "160 MHz"
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endchoice
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config ESP32C3_DEFAULT_CPU_FREQ_MHZ
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int
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default 40 if ESP32C3_DEFAULT_CPU_FREQ_40
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default 80 if ESP32C3_DEFAULT_CPU_FREQ_80
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default 160 if ESP32C3_DEFAULT_CPU_FREQ_160
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choice ESP32C3_REV_MIN
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prompt "Minimum Supported ESP32-C3 Revision"
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default ESP32C3_REV_MIN_3
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help
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Required minimum chip revision. ESP-IDF will check for it and
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reject to boot if the chip revision fails the check.
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This ensures the chip used will have some modifications (features, or bugfixes).
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The complied binary will only support chips above this revision,
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this will also help to reduce binary size.
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config ESP32C3_REV_MIN_0
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bool "Rev v0.0 (ECO0)"
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config ESP32C3_REV_MIN_1
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bool "Rev v0.1 (ECO1)"
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config ESP32C3_REV_MIN_2
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bool "Rev v0.2 (ECO2)"
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config ESP32C3_REV_MIN_3
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bool "Rev v0.3 (ECO3)"
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config ESP32C3_REV_MIN_4
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bool "Rev v0.4 (ECO4)"
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config ESP32C3_REV_MIN_101
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bool "Rev v1.1"
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endchoice
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config ESP32C3_REV_MIN
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# we keep it for compatibility. Use ESP32C3_REV_MIN_FULL instead.
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int
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default 0 if ESP32C3_REV_MIN_0
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default 1 if ESP32C3_REV_MIN_1
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default 2 if ESP32C3_REV_MIN_2
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default 3 if ESP32C3_REV_MIN_3
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default 4 if ESP32C3_REV_MIN_4
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default 101 if ESP32C3_REV_MIN_101
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config ESP32C3_REV_MIN_FULL
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int
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default 0 if ESP32C3_REV_MIN_0
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default 1 if ESP32C3_REV_MIN_1
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default 2 if ESP32C3_REV_MIN_2
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default 3 if ESP32C3_REV_MIN_3
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default 4 if ESP32C3_REV_MIN_4
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default 101 if ESP32C3_REV_MIN_101
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config ESP_REV_MIN_FULL
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int
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default ESP32C3_REV_MIN_FULL
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#
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# MAX Revision
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#
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choice ESP32C3_REV_MAX_FULL_STR
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prompt "Maximum Supported ESP32-C3 Revision"
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config ESP32C3_REV_MAX_FULL_STR_OPT
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bool "Rev v0.99"
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endchoice
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# Maximum revision that IDF supports.
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# It can not be changed by user.
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# Only Espressif can change it when a new version will be supported in IDF.
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# Supports all chips starting from ESP32C3_REV_MIN_FULL to ESP32C3_REV_MAX_FULL
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config ESP32C3_REV_MAX_FULL
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int
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default 199 if ESP32C3_REV101_DEVELOPMENT
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default 99 if !ESP32C3_REV101_DEVELOPMENT
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# keep in sync the "Maximum Supported Revision" description with this value
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config ESP_REV_MAX_FULL
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int
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default ESP32C3_REV_MAX_FULL
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config ESP32C3_REV101_DEVELOPMENT
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bool "Develop on ESP32-C3 v1.1 (Preview)"
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default y if IDF_CI_BUILD
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config ESP32C3_DEBUG_OCDAWARE
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bool "Make exception and panic handlers JTAG/OCD aware"
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default y
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select FREERTOS_DEBUG_OCDAWARE
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help
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The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
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instead of panicking, have the debugger stop on the offending instruction.
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config ESP32C3_BROWNOUT_DET
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bool "Hardware brownout detect & reset"
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depends on !IDF_ENV_FPGA
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default y
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help
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The ESP32-C3 has a built-in brownout detector which can detect if the voltage is lower than
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a specific value. If this happens, it will reset the chip in order to prevent unintended
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behaviour.
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choice ESP32C3_BROWNOUT_DET_LVL_SEL
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prompt "Brownout voltage level"
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depends on ESP32C3_BROWNOUT_DET
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default ESP32C3_BROWNOUT_DET_LVL_SEL_7
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help
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The brownout detector will reset the chip when the supply voltage is approximately
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below this level. Note that there may be some variation of brownout voltage level
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between each chip.
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#The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
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#of the brownout threshold levels.
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config ESP32C3_BROWNOUT_DET_LVL_SEL_7
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bool "2.51V"
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config ESP32C3_BROWNOUT_DET_LVL_SEL_6
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bool "2.64V"
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config ESP32C3_BROWNOUT_DET_LVL_SEL_5
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bool "2.76V"
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config ESP32C3_BROWNOUT_DET_LVL_SEL_4
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bool "2.92V"
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config ESP32C3_BROWNOUT_DET_LVL_SEL_3
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bool "3.10V"
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config ESP32C3_BROWNOUT_DET_LVL_SEL_2
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bool "3.27V"
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endchoice
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config ESP32C3_BROWNOUT_DET_LVL
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int
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default 2 if ESP32C3_BROWNOUT_DET_LVL_SEL_2
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default 3 if ESP32C3_BROWNOUT_DET_LVL_SEL_3
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default 4 if ESP32C3_BROWNOUT_DET_LVL_SEL_4
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default 5 if ESP32C3_BROWNOUT_DET_LVL_SEL_5
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default 6 if ESP32C3_BROWNOUT_DET_LVL_SEL_6
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default 7 if ESP32C3_BROWNOUT_DET_LVL_SEL_7
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choice ESP32C3_TIME_SYSCALL
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prompt "Timers used for gettimeofday function"
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default ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER
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help
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This setting defines which hardware timers are used to
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implement 'gettimeofday' and 'time' functions in C library.
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- If both high-resolution (systimer) and RTC timers are used, timekeeping will
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continue in deep sleep. Time will be reported at 1 microsecond
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resolution. This is the default, and the recommended option.
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- If only high-resolution timer (systimer) is used, gettimeofday will
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provide time at microsecond resolution.
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Time will not be preserved when going into deep sleep mode.
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- If only RTC timer is used, timekeeping will continue in
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deep sleep, but time will be measured at 6.(6) microsecond
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resolution. Also the gettimeofday function itself may take
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longer to run.
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- If no timers are used, gettimeofday and time functions
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return -1 and set errno to ENOSYS.
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- When RTC is used for timekeeping, two RTC_STORE registers are
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used to keep time in deep sleep mode.
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config ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER
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bool "RTC and high-resolution timer"
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select ESP_TIME_FUNCS_USE_RTC_TIMER
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select ESP_TIME_FUNCS_USE_ESP_TIMER
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config ESP32C3_TIME_SYSCALL_USE_RTC
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bool "RTC"
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select ESP_TIME_FUNCS_USE_RTC_TIMER
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config ESP32C3_TIME_SYSCALL_USE_SYSTIMER
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bool "High-resolution timer"
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select ESP_TIME_FUNCS_USE_ESP_TIMER
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config ESP32C3_TIME_SYSCALL_USE_NONE
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bool "None"
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select ESP_TIME_FUNCS_USE_NONE
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endchoice
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choice ESP32C3_RTC_CLK_SRC
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prompt "RTC clock source"
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default ESP32C3_RTC_CLK_SRC_INT_RC
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help
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Choose which clock is used as RTC clock source.
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config ESP32C3_RTC_CLK_SRC_INT_RC
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bool "Internal 150kHz RC oscillator"
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config ESP32C3_RTC_CLK_SRC_EXT_CRYS
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bool "External 32kHz crystal"
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select ESP_SYSTEM_RTC_EXT_XTAL
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config ESP32C3_RTC_CLK_SRC_EXT_OSC
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bool "External 32kHz oscillator at 32K_XP pin"
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select ESP_SYSTEM_RTC_EXT_OSC
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config ESP32C3_RTC_CLK_SRC_INT_8MD256
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bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
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endchoice
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config ESP32C3_RTC_CLK_CAL_CYCLES
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int "Number of cycles for RTC_SLOW_CLK calibration"
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default 3000 if ESP32C3_RTC_CLK_SRC_EXT_CRYS || ESP32C3_RTC_CLK_SRC_EXT_OSC || ESP32C3_RTC_CLK_SRC_INT_8MD256
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default 1024 if ESP32C3_RTC_CLK_SRC_INT_RC
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range 0 27000 if ESP32C3_RTC_CLK_SRC_EXT_CRYS || ESP32C3_RTC_CLK_SRC_EXT_OSC || ESP32C3_RTC_CLK_SRC_INT_8MD256
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range 0 32766 if ESP32C3_RTC_CLK_SRC_INT_RC
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help
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When the startup code initializes RTC_SLOW_CLK, it can perform
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calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
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frequency. This option sets the number of RTC_SLOW_CLK cycles measured
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by the calibration routine. Higher numbers increase calibration
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precision, which may be important for applications which spend a lot of
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time in deep sleep. Lower numbers reduce startup time.
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When this option is set to 0, clock calibration will not be performed at
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startup, and approximate clock frequencies will be assumed:
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- 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
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- 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
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In case more value will help improve the definition of the launch of the crystal.
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If the crystal could not start, it will be switched to internal RC.
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config ESP32C3_NO_BLOBS
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bool "No Binary Blobs"
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depends on !BT_ENABLED
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default n
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help
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If enabled, this disables the linking of binary libraries in the application build. Note
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that after enabling this Wi-Fi/Bluetooth will not work.
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endmenu # ESP32C3-Specific
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