esp-idf/components/esp32c3/Kconfig
2023-11-23 14:07:55 +08:00

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menu "ESP32C3-Specific"
visible if IDF_TARGET_ESP32C3
choice ESP32C3_DEFAULT_CPU_FREQ_MHZ
prompt "CPU frequency"
default ESP32C3_DEFAULT_CPU_FREQ_40 if IDF_ENV_FPGA
default ESP32C3_DEFAULT_CPU_FREQ_160 if !IDF_ENV_FPGA
help
CPU frequency to be set on application startup.
config ESP32C3_DEFAULT_CPU_FREQ_40
bool "40 MHz"
depends on IDF_ENV_FPGA
config ESP32C3_DEFAULT_CPU_FREQ_80
bool "80 MHz"
config ESP32C3_DEFAULT_CPU_FREQ_160
bool "160 MHz"
endchoice
config ESP32C3_DEFAULT_CPU_FREQ_MHZ
int
default 40 if ESP32C3_DEFAULT_CPU_FREQ_40
default 80 if ESP32C3_DEFAULT_CPU_FREQ_80
default 160 if ESP32C3_DEFAULT_CPU_FREQ_160
choice ESP32C3_REV_MIN
prompt "Minimum Supported ESP32-C3 Revision"
default ESP32C3_REV_MIN_3
help
Required minimum chip revision. ESP-IDF will check for it and
reject to boot if the chip revision fails the check.
This ensures the chip used will have some modifications (features, or bugfixes).
The complied binary will only support chips above this revision,
this will also help to reduce binary size.
config ESP32C3_REV_MIN_0
bool "Rev v0.0 (ECO0)"
config ESP32C3_REV_MIN_1
bool "Rev v0.1 (ECO1)"
config ESP32C3_REV_MIN_2
bool "Rev v0.2 (ECO2)"
config ESP32C3_REV_MIN_3
bool "Rev v0.3 (ECO3)"
config ESP32C3_REV_MIN_4
bool "Rev v0.4 (ECO4)"
config ESP32C3_REV_MIN_101
bool "Rev v1.1"
endchoice
config ESP32C3_REV_MIN
# we keep it for compatibility. Use ESP32C3_REV_MIN_FULL instead.
int
default 0 if ESP32C3_REV_MIN_0
default 1 if ESP32C3_REV_MIN_1
default 2 if ESP32C3_REV_MIN_2
default 3 if ESP32C3_REV_MIN_3
default 4 if ESP32C3_REV_MIN_4
default 101 if ESP32C3_REV_MIN_101
config ESP32C3_REV_MIN_FULL
int
default 0 if ESP32C3_REV_MIN_0
default 1 if ESP32C3_REV_MIN_1
default 2 if ESP32C3_REV_MIN_2
default 3 if ESP32C3_REV_MIN_3
default 4 if ESP32C3_REV_MIN_4
default 101 if ESP32C3_REV_MIN_101
config ESP_REV_MIN_FULL
int
default ESP32C3_REV_MIN_FULL
#
# MAX Revision
#
choice ESP32C3_REV_MAX_FULL_STR
prompt "Maximum Supported ESP32-C3 Revision"
config ESP32C3_REV_MAX_FULL_STR_OPT
bool "Rev v0.99"
endchoice
# Maximum revision that IDF supports.
# It can not be changed by user.
# Only Espressif can change it when a new version will be supported in IDF.
# Supports all chips starting from ESP32C3_REV_MIN_FULL to ESP32C3_REV_MAX_FULL
config ESP32C3_REV_MAX_FULL
int
default 199 if ESP32C3_REV101_DEVELOPMENT
default 99 if !ESP32C3_REV101_DEVELOPMENT
# keep in sync the "Maximum Supported Revision" description with this value
config ESP_REV_MAX_FULL
int
default ESP32C3_REV_MAX_FULL
config ESP32C3_REV101_DEVELOPMENT
bool "Develop on ESP32-C3 v1.1 (Preview)"
default y if IDF_CI_BUILD
config ESP32C3_DEBUG_OCDAWARE
bool "Make exception and panic handlers JTAG/OCD aware"
default y
select FREERTOS_DEBUG_OCDAWARE
help
The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
instead of panicking, have the debugger stop on the offending instruction.
config ESP32C3_BROWNOUT_DET
bool "Hardware brownout detect & reset"
depends on !IDF_ENV_FPGA
default y
help
The ESP32-C3 has a built-in brownout detector which can detect if the voltage is lower than
a specific value. If this happens, it will reset the chip in order to prevent unintended
behaviour.
choice ESP32C3_BROWNOUT_DET_LVL_SEL
prompt "Brownout voltage level"
depends on ESP32C3_BROWNOUT_DET
default ESP32C3_BROWNOUT_DET_LVL_SEL_7
help
The brownout detector will reset the chip when the supply voltage is approximately
below this level. Note that there may be some variation of brownout voltage level
between each chip.
#The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
#of the brownout threshold levels.
config ESP32C3_BROWNOUT_DET_LVL_SEL_7
bool "2.51V"
config ESP32C3_BROWNOUT_DET_LVL_SEL_6
bool "2.64V"
config ESP32C3_BROWNOUT_DET_LVL_SEL_5
bool "2.76V"
config ESP32C3_BROWNOUT_DET_LVL_SEL_4
bool "2.92V"
config ESP32C3_BROWNOUT_DET_LVL_SEL_3
bool "3.10V"
config ESP32C3_BROWNOUT_DET_LVL_SEL_2
bool "3.27V"
endchoice
config ESP32C3_BROWNOUT_DET_LVL
int
default 2 if ESP32C3_BROWNOUT_DET_LVL_SEL_2
default 3 if ESP32C3_BROWNOUT_DET_LVL_SEL_3
default 4 if ESP32C3_BROWNOUT_DET_LVL_SEL_4
default 5 if ESP32C3_BROWNOUT_DET_LVL_SEL_5
default 6 if ESP32C3_BROWNOUT_DET_LVL_SEL_6
default 7 if ESP32C3_BROWNOUT_DET_LVL_SEL_7
choice ESP32C3_TIME_SYSCALL
prompt "Timers used for gettimeofday function"
default ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER
help
This setting defines which hardware timers are used to
implement 'gettimeofday' and 'time' functions in C library.
- If both high-resolution (systimer) and RTC timers are used, timekeeping will
continue in deep sleep. Time will be reported at 1 microsecond
resolution. This is the default, and the recommended option.
- If only high-resolution timer (systimer) is used, gettimeofday will
provide time at microsecond resolution.
Time will not be preserved when going into deep sleep mode.
- If only RTC timer is used, timekeeping will continue in
deep sleep, but time will be measured at 6.(6) microsecond
resolution. Also the gettimeofday function itself may take
longer to run.
- If no timers are used, gettimeofday and time functions
return -1 and set errno to ENOSYS.
- When RTC is used for timekeeping, two RTC_STORE registers are
used to keep time in deep sleep mode.
config ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER
bool "RTC and high-resolution timer"
select ESP_TIME_FUNCS_USE_RTC_TIMER
select ESP_TIME_FUNCS_USE_ESP_TIMER
config ESP32C3_TIME_SYSCALL_USE_RTC
bool "RTC"
select ESP_TIME_FUNCS_USE_RTC_TIMER
config ESP32C3_TIME_SYSCALL_USE_SYSTIMER
bool "High-resolution timer"
select ESP_TIME_FUNCS_USE_ESP_TIMER
config ESP32C3_TIME_SYSCALL_USE_NONE
bool "None"
select ESP_TIME_FUNCS_USE_NONE
endchoice
choice ESP32C3_RTC_CLK_SRC
prompt "RTC clock source"
default ESP32C3_RTC_CLK_SRC_INT_RC
help
Choose which clock is used as RTC clock source.
config ESP32C3_RTC_CLK_SRC_INT_RC
bool "Internal 150kHz RC oscillator"
config ESP32C3_RTC_CLK_SRC_EXT_CRYS
bool "External 32kHz crystal"
select ESP_SYSTEM_RTC_EXT_XTAL
config ESP32C3_RTC_CLK_SRC_EXT_OSC
bool "External 32kHz oscillator at 32K_XP pin"
select ESP_SYSTEM_RTC_EXT_OSC
config ESP32C3_RTC_CLK_SRC_INT_8MD256
bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
endchoice
config ESP32C3_RTC_CLK_CAL_CYCLES
int "Number of cycles for RTC_SLOW_CLK calibration"
default 3000 if ESP32C3_RTC_CLK_SRC_EXT_CRYS || ESP32C3_RTC_CLK_SRC_EXT_OSC || ESP32C3_RTC_CLK_SRC_INT_8MD256
default 1024 if ESP32C3_RTC_CLK_SRC_INT_RC
range 0 27000 if ESP32C3_RTC_CLK_SRC_EXT_CRYS || ESP32C3_RTC_CLK_SRC_EXT_OSC || ESP32C3_RTC_CLK_SRC_INT_8MD256
range 0 32766 if ESP32C3_RTC_CLK_SRC_INT_RC
help
When the startup code initializes RTC_SLOW_CLK, it can perform
calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
frequency. This option sets the number of RTC_SLOW_CLK cycles measured
by the calibration routine. Higher numbers increase calibration
precision, which may be important for applications which spend a lot of
time in deep sleep. Lower numbers reduce startup time.
When this option is set to 0, clock calibration will not be performed at
startup, and approximate clock frequencies will be assumed:
- 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
- 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
In case more value will help improve the definition of the launch of the crystal.
If the crystal could not start, it will be switched to internal RC.
config ESP32C3_NO_BLOBS
bool "No Binary Blobs"
depends on !BT_ENABLED
default n
help
If enabled, this disables the linking of binary libraries in the application build. Note
that after enabling this Wi-Fi/Bluetooth will not work.
endmenu # ESP32C3-Specific