esp-idf/components/ulp/ulp_riscv/ulp_core
LonerDan 37fad48e1f fix(ulp-risc-v): Set RTC GPIO output mode in the correct register for ULP RISC-V
According to the ESP32-S2/S3 TRM, the output pin's mode is set in the RTC_GPIO_PINn_REG
by programming the RTC_GPIO_PINn_PAD_DRIVER bit. The current ULP RISC-V RTCIO driver
however, incorrectly programs the RTC_IO_TOUCH_PADn_REG register field RTC_IO_TOUCH_PADn_DRV.
This commit fixes the bug.
2024-06-18 14:33:13 +02:00
..
include fix(ulp-risc-v): Set RTC GPIO output mode in the correct register for ULP RISC-V 2024-06-18 14:33:13 +02:00
start.S feat(ulp-riscv): Added Kconfig option to enable ULP RISC-V interrupts 2024-02-21 11:45:06 +01:00
ulp_riscv_adc.c ulp: migrate tests to pytest embedded 2022-08-03 09:36:17 +08:00
ulp_riscv_gpio.c feat(ulp-riscv): Added Kconfig option to enable ULP RISC-V interrupts 2024-02-21 11:45:06 +01:00
ulp_riscv_i2c.c fix(ulp-riscv): Wrapped all RTC I2C and UART operations in critical sections 2024-02-21 11:45:06 +01:00
ulp_riscv_interrupt.c feat(ulp-riscv): Added Kconfig option to enable ULP RISC-V interrupts 2024-02-21 11:45:06 +01:00
ulp_riscv_lock.c ulp-riscv: added lock API to provide mutual exclusion when sharing variables between the main CPU and the ULP. 2022-08-05 18:16:31 +08:00
ulp_riscv_print.c feat(ulp-riscv): Add convenience print function that supports different widths 2024-03-19 09:41:05 +01:00
ulp_riscv_touch.c ulp-riscv-touch: Added support for the touch sensor on ULP RISC-V 2023-06-09 08:41:34 +02:00
ulp_riscv_uart.c fix(ulp): enable astyle linter and format ULP component 2024-01-22 11:43:38 +08:00
ulp_riscv_utils.c feat(ulp-riscv): Added Kconfig option to enable ULP RISC-V interrupts 2024-02-21 11:45:06 +01:00
ulp_riscv_vectors.S feat(ulp-riscv): Added Kconfig option to enable ULP RISC-V interrupts 2024-02-21 11:45:06 +01:00