SalimTerryLi 874a720286 soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one ... update all struct headers to be more "standardized": - bit fields are properly wrapped with struct - bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits - bit field should be uint32_t - typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199 added helper macros to force peripheral registers being accessed in 32 bitwidth added a check script into ci		2021-08-30 13:50:58 +08:00
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include/hal	soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one	2021-08-30 13:50:58 +08:00
brownout_hal.c	esp32s3: BROWNOUT reset reason is set directly without using the brownout ISR	2021-01-18 15:38:09 +08:00
hmac_hal.c	[esp_hw_support]: HMAC upstream support for S3	2021-08-13 12:01:06 +08:00
interrupt_descriptor_table.c	Whitespace: Automated whitespace fixes (large commit)	2020-11-11 07:36:35 +00:00
touch_sensor_hal.c	touch_sensor: fix esp32s2 touch sensor default power source	2021-05-08 11:09:17 +08:00