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History

Sudeep Mohanty 2ed15d8b1e ulp: Added ULP RISC-V support for esp32s3 This commit adds support for ULP RISC-V for esp32s3. Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>		2022-01-18 10:58:00 +05:30
..
main	RISCV-ULP: Add DS18B20 1wire RISCV-ULP example	2021-06-25 11:26:39 +08:00
CMakeLists.txt	ulp: Added ULP RISC-V support for esp32s3	2022-01-18 10:58:00 +05:30
README.md	RISCV-ULP: Add DS18B20 1wire RISCV-ULP example	2021-06-25 11:26:39 +08:00
sdkconfig.defaults	RISCV-ULP: Add DS18B20 1wire RISCV-ULP example	2021-06-25 11:26:39 +08:00

README.md

Supported Targets	ESP32-S2

ULP-RISC-V DS18B20 Temperature Sensor OneWire Communication

This example demonstrates how to program the ULP-RISC-V co-processor to read temperature from a DS18B20 temperature sensor over 1-Wire. When the measurement exceeds the limit set(32.5 degrees) the co-processor will wake up the main CPU from deep-sleep and the main CPU will print the temperature measurement.

Hardware Required

A development board with a SOC which has a RISC-V ULP coprocessor (e.g., ESP32-S2 Saola)
A USB cable for power supply and programming
A DS18B20 temperature sensor

Example connection :

ESP Dev-kit	DS18B20
GPIO4	DQ
VCC 3.3V	VDD
GND	GND

Example output

Not a ULP wakeup, initializing it!
Entering in deep sleep

...

ULP-RISC-V woke up the main CPU, temperature is above set limit!
ULP-RISC-V read temperature is 32.562500
Entering in deep sleep

...

ULP-RISC-V woke up the main CPU, temperature is above set limit!
ULP-RISC-V read temperature is 33.000000
Entering in deep sleep