Marius Vikhammer 8b0860ef95 ulp-riscv: enable ULP-RISCV ADC example for esp32s2
ADC can now be used from the ULP-RISCV on S2 after the RTC power parameters were
fixed in a624d8d0619de8d3

Closes https://github.com/espressif/esp-idf/issues/11052
Closes https://github.com/espressif/esp-idf/issues/11040
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System Examples

Configuration and management of memory, interrupts, WDT (watchdog timer), OTA (over the air updates), deep sleep logging, and event loops.

See the README.md file in the upper level examples directory for more information about examples.