Sudeep Mohanty 07a506bb02 ulp-riscv-i2c: Updated API documentation about sub register address usage ... The RTC I2C peripheral always expects a I2C slave sub register address to be programmed. If it is not programmed then a sub register address available in SENS_SAR_I2C_CTRL_REG[18:11] is used for I2C read/write. This commit updates the documentation of the API ulp_riscv_i2c_master_set_slave_reg_addr() to clarify the same.		2022-12-29 09:58:24 +01:00
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esp32s2	ulp: change deprecated headers to use relative includes to avoid recursivly including the same header	2022-02-11 14:56:11 +08:00
ulp_riscv	ulp-riscv: add support for using ADC as well as an example show-casing it.	2022-07-11 09:31:22 +08:00
ulp_riscv_adc.h	ulp-fsm: Update ulp-fsm ADC example with S3 support	2022-09-07 16:48:06 +08:00
ulp_riscv_i2c.h	ulp-riscv-i2c: Updated API documentation about sub register address usage	2022-12-29 09:58:24 +01:00
ulp_riscv_lock.h	ulp-riscv: added lock API to provide mutual exclusion when sharing variables between the main CPU and the ULP.	2022-08-05 18:16:31 +08:00
ulp_riscv.h	docs: fix all doxygen warnings	2022-05-12 14:50:03 +08:00