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bd4802104b
EFUSE_PWR_ON_NUM in C3 has default value = 0x2880, now = 0x3000
148 lines
4.0 KiB
C
148 lines
4.0 KiB
C
/*
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include <stdbool.h>
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#include "soc/efuse_periph.h"
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#include "hal/assert.h"
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#include "esp32c3/rom/efuse.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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// Always inline these functions even no gcc optimization is applied.
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/******************* eFuse fields *************************/
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_flash_crypt_cnt(void)
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{
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return EFUSE.rd_repeat_data1.spi_boot_crypt_cnt;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_wdt_delay_sel(void)
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{
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return EFUSE.rd_repeat_data1.wdt_delay_sel;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_mac0(void)
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{
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return EFUSE.rd_mac_spi_sys_0;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_mac1(void)
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{
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return EFUSE.rd_mac_spi_sys_1.mac_1;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_secure_boot_v2_en(void)
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{
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return EFUSE.rd_repeat_data2.secure_boot_en;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_err_rst_enable(void)
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{
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return EFUSE.rd_repeat_data3.err_rst_enable;
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}
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// use efuse_hal_get_major_chip_version() to get major chip version
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_wafer_version_major(void)
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{
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return EFUSE.rd_mac_spi_sys_5.wafer_version_major;
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}
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// use efuse_hal_get_minor_chip_version() to get minor chip version
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_wafer_version_minor(void)
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{
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return (EFUSE.rd_mac_spi_sys_5.wafer_version_minor_high << 3) + EFUSE.rd_mac_spi_sys_3.wafer_version_minor_low;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_disable_wafer_version_major(void)
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{
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return EFUSE.rd_repeat_data4.disable_wafer_version_major;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_blk_version_major(void)
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{
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return EFUSE.rd_sys_part1_data4.blk_version_major;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_blk_version_minor(void)
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{
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return EFUSE.rd_mac_spi_sys_3.blk_version_minor;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_disable_blk_version_major(void)
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{
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return EFUSE.rd_repeat_data4.disable_blk_version_major;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_ver_pkg(void)
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{
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return EFUSE.rd_mac_spi_sys_3.pkg_version;
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}
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/******************* eFuse control functions *************************/
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__attribute__((always_inline)) static inline bool efuse_ll_get_read_cmd(void)
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{
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return EFUSE.cmd.read_cmd;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_pgm_cmd(void)
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{
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return EFUSE.cmd.pgm_cmd;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_read_cmd(void)
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{
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EFUSE.cmd.read_cmd = 1;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(uint32_t block)
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{
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HAL_ASSERT(block < ETS_EFUSE_BLOCK_MAX);
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EFUSE.cmd.val = ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void)
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{
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EFUSE.conf.op_code = EFUSE_READ_OP_CODE;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void)
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{
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EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_dac_num(uint8_t val)
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{
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EFUSE.dac_conf.dac_num = val;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_dac_clk_div(uint8_t val)
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{
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EFUSE.dac_conf.dac_clk_div = val;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_pwr_on_num(uint16_t val)
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{
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EFUSE.wr_tim_conf1.pwr_on_num = val;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_pwr_off_num(uint16_t value)
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{
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EFUSE.wr_tim_conf2.pwr_off_num = value;
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}
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/******************* eFuse control functions *************************/
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#ifdef __cplusplus
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}
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#endif
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