Omar Chebib e533431095 espcoredump: Fix bugs related to (fake) stacks ... Add support to tasks stacks in RTC DRAM. Before this fix, any stack in RTC DRAM would have been considered as corrupted, whichi is not the case. Fix a bug related to wrong parameters passed to esp_core_dump_get_stack. Fix a bug reading fake stack memory, triggering a memory violation. * Closes https://github.com/espressif/esp-idf/issues/6751 * Merges https://github.com/espressif/esp-idf/pull/6750		2021-03-22 11:38:21 +08:00
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corefile	fix(coredump): parse registers values from stack	2021-01-29 11:12:21 +08:00
include	Merge branch 'feature/coredump_refactor_riscv_support' into 'master'	2021-02-25 22:41:27 +00:00
include_core_dump	espcoredump: code refactoring and add support for RISC-V implemetation	2021-02-07 19:04:19 +08:00
src	espcoredump: Fix bugs related to (fake) stacks	2021-03-22 11:38:21 +08:00
test	core dump: modify the test according to the refactor	2021-01-21 15:14:59 +08:00
CMakeLists.txt	espcoredump: code refactoring and add support for RISC-V implemetation	2021-02-07 19:04:19 +08:00
component.mk	espcoredump: Fix bugs related to (fake) stacks	2021-03-22 11:38:21 +08:00
espcoredump.py	Add mypy check to pre-commit-config	2021-02-25 07:05:43 +00:00
Kconfig	espcoredump: code refactoring and add support for RISC-V implemetation	2021-02-07 19:04:19 +08:00
linker.lf	ldgen: use uppercase keywords for flags	2021-03-01 14:19:34 +08:00
sdkconfig.rename	espcoredump: remove ESP32 prefix from config options	2020-09-30 20:22:27 +05:30