mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
6deaefde69
Some newer ESP32 variants (like ESP32-PICO-V3 and ESP32-PICO-MINI-02) do implement this pin and it can be used as a normal GPIO. Fixes #6016 Fixes #6837 Closes https://github.com/espressif/esp-idf/pull/6918
102 lines
2.0 KiB
C
102 lines
2.0 KiB
C
// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
|
|
//
|
|
// Licensed under the Apache License, Version 2.0 (the "License");
|
|
// you may not use this file except in compliance with the License.
|
|
// You may obtain a copy of the License at
|
|
//
|
|
// http://www.apache.org/licenses/LICENSE-2.0
|
|
//
|
|
// Unless required by applicable law or agreed to in writing, software
|
|
// distributed under the License is distributed on an "AS IS" BASIS,
|
|
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
// See the License for the specific language governing permissions and
|
|
// limitations under the License.
|
|
|
|
#include "soc/gpio_periph.h"
|
|
|
|
const uint32_t GPIO_PIN_MUX_REG[SOC_GPIO_PIN_COUNT] = {
|
|
IO_MUX_GPIO0_REG,
|
|
IO_MUX_GPIO1_REG,
|
|
IO_MUX_GPIO2_REG,
|
|
IO_MUX_GPIO3_REG,
|
|
IO_MUX_GPIO4_REG,
|
|
IO_MUX_GPIO5_REG,
|
|
IO_MUX_GPIO6_REG,
|
|
IO_MUX_GPIO7_REG,
|
|
IO_MUX_GPIO8_REG,
|
|
IO_MUX_GPIO9_REG,
|
|
IO_MUX_GPIO10_REG,
|
|
IO_MUX_GPIO11_REG,
|
|
IO_MUX_GPIO12_REG,
|
|
IO_MUX_GPIO13_REG,
|
|
IO_MUX_GPIO14_REG,
|
|
IO_MUX_GPIO15_REG,
|
|
IO_MUX_GPIO16_REG,
|
|
IO_MUX_GPIO17_REG,
|
|
IO_MUX_GPIO18_REG,
|
|
IO_MUX_GPIO19_REG,
|
|
IO_MUX_GPIO20_REG, // This corresponding pin is only available on ESP32-PICO-V3 chip package
|
|
IO_MUX_GPIO21_REG,
|
|
IO_MUX_GPIO22_REG,
|
|
IO_MUX_GPIO23_REG,
|
|
0,
|
|
IO_MUX_GPIO25_REG,
|
|
IO_MUX_GPIO26_REG,
|
|
IO_MUX_GPIO27_REG,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
IO_MUX_GPIO32_REG,
|
|
IO_MUX_GPIO33_REG,
|
|
IO_MUX_GPIO34_REG,
|
|
IO_MUX_GPIO35_REG,
|
|
IO_MUX_GPIO36_REG,
|
|
IO_MUX_GPIO37_REG,
|
|
IO_MUX_GPIO38_REG,
|
|
IO_MUX_GPIO39_REG,
|
|
};
|
|
|
|
const uint32_t GPIO_HOLD_MASK[SOC_GPIO_PIN_COUNT] = {
|
|
0,
|
|
BIT(1),
|
|
0,
|
|
BIT(0),
|
|
0,
|
|
BIT(8),
|
|
BIT(2),
|
|
BIT(3),
|
|
BIT(4),
|
|
BIT(5),
|
|
BIT(6),
|
|
BIT(7),
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
BIT(9),
|
|
BIT(10),
|
|
BIT(11),
|
|
BIT(12),
|
|
0,
|
|
BIT(14),
|
|
BIT(15),
|
|
BIT(16),
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
};
|