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https://github.com/espressif/esp-idf.git
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111 lines
3.0 KiB
C
111 lines
3.0 KiB
C
/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include "sdkconfig.h"
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#include "sdmmc_types.h"
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#include "soc/soc_caps.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define SDMMC_HOST_SLOT_0 0 ///< SDMMC slot 0
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#define SDMMC_HOST_SLOT_1 1 ///< SDMMC slot 1
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/**
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* @brief Default sdmmc_host_t structure initializer for SDMMC peripheral
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*
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* Uses SDMMC peripheral, with 4-bit mode enabled, and max frequency set to 20MHz
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*/
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#define SDMMC_HOST_DEFAULT() {\
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.flags = SDMMC_HOST_FLAG_8BIT | \
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SDMMC_HOST_FLAG_4BIT | \
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SDMMC_HOST_FLAG_1BIT | \
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SDMMC_HOST_FLAG_DDR, \
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.slot = SDMMC_HOST_SLOT_1, \
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.max_freq_khz = SDMMC_FREQ_DEFAULT, \
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.io_voltage = 3.3f, \
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.init = &sdmmc_host_init, \
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.set_bus_width = &sdmmc_host_set_bus_width, \
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.get_bus_width = &sdmmc_host_get_slot_width, \
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.set_bus_ddr_mode = &sdmmc_host_set_bus_ddr_mode, \
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.set_card_clk = &sdmmc_host_set_card_clk, \
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.set_cclk_always_on = &sdmmc_host_set_cclk_always_on, \
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.do_transaction = &sdmmc_host_do_transaction, \
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.deinit = &sdmmc_host_deinit, \
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.io_int_enable = sdmmc_host_io_int_enable, \
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.io_int_wait = sdmmc_host_io_int_wait, \
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.command_timeout_ms = 0, \
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.get_real_freq = &sdmmc_host_get_real_freq, \
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.input_delay_phase = SDMMC_DELAY_PHASE_0, \
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.set_input_delay = &sdmmc_host_set_input_delay \
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}
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#define SDMMC_SLOT_NO_CD GPIO_NUM_NC ///< indicates that card detect line is not used
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#define SDMMC_SLOT_NO_WP GPIO_NUM_NC ///< indicates that write protect line is not used
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#define SDMMC_SLOT_WIDTH_DEFAULT 0 ///< use the maximum possible width for the slot
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#if SOC_SDMMC_USE_IOMUX && !SOC_SDMMC_USE_GPIO_MATRIX
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/**
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* Macro defining default configuration of SDMMC host slot
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*/
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#define SDMMC_SLOT_CONFIG_DEFAULT() {\
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.cd = SDMMC_SLOT_NO_CD, \
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.wp = SDMMC_SLOT_NO_WP, \
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.width = SDMMC_SLOT_WIDTH_DEFAULT, \
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.flags = 0, \
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}
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#else
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/**
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* Macro defining default configuration of SDMMC host slot
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*/
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#if CONFIG_IDF_TARGET_ESP32P4
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#define SDMMC_SLOT_CONFIG_DEFAULT() {\
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.clk = GPIO_NUM_43, \
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.cmd = GPIO_NUM_44, \
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.d0 = GPIO_NUM_39, \
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.d1 = GPIO_NUM_40, \
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.d2 = GPIO_NUM_41, \
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.d3 = GPIO_NUM_42, \
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.d4 = GPIO_NUM_45, \
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.d5 = GPIO_NUM_46, \
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.d6 = GPIO_NUM_47, \
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.d7 = GPIO_NUM_48, \
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.cd = SDMMC_SLOT_NO_CD, \
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.wp = SDMMC_SLOT_NO_WP, \
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.width = SDMMC_SLOT_WIDTH_DEFAULT, \
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.flags = 0, \
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}
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#elif CONFIG_IDF_TARGET_ESP32S3
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#define SDMMC_SLOT_CONFIG_DEFAULT() {\
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.clk = GPIO_NUM_14, \
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.cmd = GPIO_NUM_15, \
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.d0 = GPIO_NUM_2, \
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.d1 = GPIO_NUM_4, \
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.d2 = GPIO_NUM_12, \
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.d3 = GPIO_NUM_13, \
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.d4 = GPIO_NUM_33, \
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.d5 = GPIO_NUM_34, \
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.d6 = GPIO_NUM_35, \
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.d7 = GPIO_NUM_36, \
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.cd = SDMMC_SLOT_NO_CD, \
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.wp = SDMMC_SLOT_NO_WP, \
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.width = SDMMC_SLOT_WIDTH_DEFAULT, \
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.flags = 0, \
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}
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#endif // GPIO Matrix chips
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#endif
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#ifdef __cplusplus
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}
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#endif
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