mirror of
https://github.com/espressif/esp-idf.git
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333553caf2
fix(hal/include): fix header violations in hal component fix(hal/include): Move type definitions from `xx_hal.h` to `xx_types.h` fix(hal/include): Move type definitions from `xx_hal.h` to `xx_types.h` fix(hal/include): Add comment for a far away `#endif` fix(hal/include): change scope for cpp guard ci: Remove components/hal/ comment from public headers check exceptions Add missing include macro sdkconfig.h for header files Add missing include macro stdbool.h for header files Add missing include macro stdint.h for header files Add missing capability guard macro for header files Add missing cpp guard macro for header files Remove some useless include macros Add some missing `inline` attribute for functions defined in header files Remove components/hal/ from public headers check exceptions fix(hal/include): fix invalid licenses fix(hal/include): fix invalid licenses fix(hal/include): add missing soc_caps.h fix(hal): include soc_caps.h before cap macro is used fix(hal): Remove unnecessary target check fix(hal): fix header and macro problems Add missing include macro Remove loop dependency in hal Add comment for far-away endif fix(hal): Add missing soc_caps.h ci: update check_copyright_ignore.txt Change the sequence of `#include` macro, cpp guard macro Change the wrap scope of capacity macro fix(hal): Change position of C++ guard to pass test
132 lines
3.6 KiB
C
132 lines
3.6 KiB
C
/*
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* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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// The LL layer for UHCI register operations.
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// Note that most of the register operations in this layer are non-atomic operations.
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#pragma once
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#include <stdio.h>
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#include "hal/uhci_types.h"
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#include "soc/uhci_struct.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define UHCI_LL_GET_HW(num) (((num) == 0) ? (&UHCI0) : (NULL))
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typedef enum {
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UHCI_RX_BREAK_CHR_EOF = 0x1,
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UHCI_RX_IDLE_EOF = 0x2,
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UHCI_RX_LEN_EOF = 0x4,
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UHCI_RX_EOF_MAX = 0x7,
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} uhci_rxeof_cfg_t;
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static inline void uhci_ll_init(uhci_dev_t *hw)
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{
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typeof(hw->conf0) conf0_reg;
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hw->conf0.clk_en = 1;
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conf0_reg.val = 0;
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conf0_reg.clk_en = 1;
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hw->conf0.val = conf0_reg.val;
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hw->conf1.val = 0;
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}
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static inline void uhci_ll_attach_uart_port(uhci_dev_t *hw, int uart_num)
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{
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hw->conf0.uart0_ce = (uart_num == 0)? 1: 0;
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hw->conf0.uart1_ce = (uart_num == 1)? 1: 0;
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hw->conf0.uart2_ce = (uart_num == 2)? 1: 0;
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}
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static inline void uhci_ll_set_seper_chr(uhci_dev_t *hw, uhci_seper_chr_t *seper_char)
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{
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if (seper_char->sub_chr_en) {
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typeof(hw->esc_conf0) esc_conf0_reg = hw->esc_conf0;
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esc_conf0_reg.seper_char = seper_char->seper_chr;
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esc_conf0_reg.seper_esc_char0 = seper_char->sub_chr1;
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esc_conf0_reg.seper_esc_char1 = seper_char->sub_chr2;
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hw->esc_conf0.val = esc_conf0_reg.val;
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hw->escape_conf.tx_c0_esc_en = 1;
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hw->escape_conf.rx_c0_esc_en = 1;
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} else {
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hw->escape_conf.tx_c0_esc_en = 0;
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hw->escape_conf.rx_c0_esc_en = 0;
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}
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}
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static inline void uhci_ll_get_seper_chr(uhci_dev_t *hw, uhci_seper_chr_t *seper_chr)
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{
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(void)hw;
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(void)seper_chr;
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}
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static inline void uhci_ll_set_swflow_ctrl_sub_chr(uhci_dev_t *hw, uhci_swflow_ctrl_sub_chr_t *sub_ctr)
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{
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typeof(hw->escape_conf) escape_conf_reg = hw->escape_conf;
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if (sub_ctr->flow_en == 1) {
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typeof(hw->esc_conf2) esc_conf2_reg = hw->esc_conf2;
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typeof(hw->esc_conf3) esc_conf3_reg = hw->esc_conf3;
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esc_conf2_reg.seq1 = sub_ctr->xon_chr;
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esc_conf2_reg.seq1_char0 = sub_ctr->xon_sub1;
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esc_conf2_reg.seq1_char1 = sub_ctr->xon_sub2;
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esc_conf3_reg.seq2 = sub_ctr->xoff_chr;
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esc_conf3_reg.seq2_char0 = sub_ctr->xoff_sub1;
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esc_conf3_reg.seq2_char1 = sub_ctr->xoff_sub2;
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escape_conf_reg.tx_11_esc_en = 1;
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escape_conf_reg.tx_13_esc_en = 1;
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escape_conf_reg.rx_11_esc_en = 1;
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escape_conf_reg.rx_13_esc_en = 1;
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hw->esc_conf2.val = esc_conf2_reg.val;
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hw->esc_conf3.val = esc_conf3_reg.val;
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} else {
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escape_conf_reg.tx_11_esc_en = 0;
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escape_conf_reg.tx_13_esc_en = 0;
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escape_conf_reg.rx_11_esc_en = 0;
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escape_conf_reg.rx_13_esc_en = 0;
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}
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hw->escape_conf.val = escape_conf_reg.val;
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}
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static inline void uhci_ll_enable_intr(uhci_dev_t *hw, uint32_t intr_mask)
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{
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hw->int_ena.val |= intr_mask;
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}
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static inline void uhci_ll_disable_intr(uhci_dev_t *hw, uint32_t intr_mask)
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{
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hw->int_ena.val &= (~intr_mask);
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}
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static inline void uhci_ll_clear_intr(uhci_dev_t *hw, uint32_t intr_mask)
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{
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hw->int_clr.val = intr_mask;
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}
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static inline uint32_t uhci_ll_get_intr(uhci_dev_t *hw)
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{
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return hw->int_st.val;
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}
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static inline void uhci_ll_set_eof_mode(uhci_dev_t *hw, uint32_t eof_mode)
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{
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if (eof_mode & UHCI_RX_BREAK_CHR_EOF) {
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hw->conf0.uart_rx_brk_eof_en = 1;
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}
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if (eof_mode & UHCI_RX_IDLE_EOF) {
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hw->conf0.uart_idle_eof_en = 1;
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}
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if (eof_mode & UHCI_RX_LEN_EOF) {
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hw->conf0.len_eof_en = 1;
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}
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}
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#ifdef __cplusplus
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}
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#endif
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