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236bd27134
Currently, we pull up cs io for spi flash/ram to reduce current leakage during light sleep. But some kind of spi flash/ram chip need all io pull up. Otherwise, current leakage will still exist.
32 lines
946 B
C
32 lines
946 B
C
/*
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* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "soc/soc.h"
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#include "soc/efuse_reg.h"
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#if CONFIG_IDF_TARGET_ESP32S3
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/**
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* Since rom of esp32s3 does not export function ets_efuse_get_opiconfig,
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* patch this function here.
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*/
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uint32_t esp_rom_efuse_get_opiconfig(void)
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{
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uint64_t spiconfig1 = REG_GET_FIELD(EFUSE_RD_MAC_SPI_SYS_2_REG, EFUSE_SPI_PAD_CONF_1);
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uint64_t spiconfig2 = REG_GET_FIELD(EFUSE_RD_MAC_SPI_SYS_3_REG, EFUSE_SPI_PAD_CONF_2);
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uint64_t opiconfig = (spiconfig2 << 12) | (spiconfig1 >> 20);
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if (opiconfig == 0 || opiconfig == 0x3fffffffllu) {
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return 0;
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}
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// （MSB）EFUSE_SPI_PAD_CONF_2(18bit) + EFUSE_SPI_PAD_CONF_1(32bit) + EFUSE_SPI_PAD_CONF_0(16bit) (LSB)
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// [36:41] -- DQS
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// [42:47] -- D4
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// [48:53] -- D5
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// [54:59] -- D6
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// [60:65] -- D7
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return opiconfig & 0x3fffffff;
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}
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#endif
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