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fbd6c9737e
According to the ESP32-S2/S3 TRM, the output pin's mode is set in the RTC_GPIO_PINn_REG by programming the RTC_GPIO_PINn_PAD_DRIVER bit. The current ULP RISC-V RTCIO driver however, incorrectly programs the RTC_IO_TOUCH_PADn_REG register field RTC_IO_TOUCH_PADn_DRV. This commit fixes the bug. |
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.. | ||
include | ||
start.S | ||
ulp_riscv_adc.c | ||
ulp_riscv_gpio.c | ||
ulp_riscv_i2c.c | ||
ulp_riscv_interrupt.c | ||
ulp_riscv_lock.c | ||
ulp_riscv_print.c | ||
ulp_riscv_touch.c | ||
ulp_riscv_uart.c | ||
ulp_riscv_utils.c | ||
ulp_riscv_vectors.S |