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48 lines
1.7 KiB
C
48 lines
1.7 KiB
C
/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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// The HAL layer for PAU (ESP32-H2 specific part)
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#include "soc/soc.h"
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#include "soc/pcr_struct.h"
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#include "esp_attr.h"
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#include "hal/misc.h"
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#include "hal/pau_hal.h"
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#include "hal/pau_types.h"
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void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_addr_t *link_addr)
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{
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/* ESP32H2 does not have PMU HP_AON power domain. because the registers
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* of PAU REGDMA is included to PMU TOP power domain, cause the contents
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* of PAU REGDMA registers will be lost when the TOP domain is powered down
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* during light sleep, so we does not need to enable REGDMA backup here.
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* We will use the software to trigger REGDMA to backup or restore. */
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}
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void IRAM_ATTR pau_hal_start_regdma_system_link(pau_hal_context_t *hal, bool backup_or_restore)
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{
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pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
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pau_ll_select_regdma_entry_link(hal->dev, 0);
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pau_ll_set_regdma_entry_link_backup_direction(hal->dev, backup_or_restore);
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pau_ll_set_regdma_entry_link_backup_start_enable(hal->dev);
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while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW));
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}
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void IRAM_ATTR pau_hal_stop_regdma_system_link(pau_hal_context_t *hal)
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{
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pau_ll_set_regdma_entry_link_backup_start_disable(hal->dev);
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pau_ll_select_regdma_entry_link(hal->dev, 0); /* restore link select to default */
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pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
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}
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void IRAM_ATTR pau_hal_regdma_clock_configure(pau_hal_context_t *hal, bool enable)
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{
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HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.regdma_conf, regdma_rst_en, !enable);
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HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.regdma_conf, regdma_clk_en, enable);
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}
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