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34 lines
1.1 KiB
C
34 lines
1.1 KiB
C
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/**
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* @brief initialize cache invalid access interrupt
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*
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* This function enables cache invalid access interrupt source and connects it
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* to interrupt input number ETS_CACHEERR_INUM (see soc/soc.h). It is called
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* from the startup code.
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*/
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void esp_cache_err_int_init(void);
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/**
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* @brief get the CPU which caused cache invalid access interrupt
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* @return
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* - PRO_CPU_NUM, if PRO_CPU has caused cache IA interrupt
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* - APP_CPU_NUM, if APP_CPU has caused cache IA interrupt
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* - (-1) otherwise
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*/
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int esp_cache_err_get_cpuid(void);
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