Omar Chebib 774f010196 freertos: Fix delay between interrupt request and trigger on RISC-V ... NOP instructions have been added in order to prevent the code from executing code it shouldn't execute. This is due to a delay between the moment an interrupt is requested and the moment it is fired. It only happens on RISC-V SoC.		2021-03-10 12:14:21 +08:00
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riscv	freertos: Fix delay between interrupt request and trigger on RISC-V	2021-03-10 12:14:21 +08:00
xtensa	system: enable shared stack watchpoint	2021-02-19 16:59:29 +08:00
port_common.c	freertos: Add RISC-V port	2020-11-13 07:49:11 +11:00