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66 lines
3.3 KiB
C
66 lines
3.3 KiB
C
#include "hal/spi_slave_hal.h"
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#include "hal/spi_ll.h"
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#include "soc/soc_caps.h"
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//This GDMA related part will be introduced by GDMA dedicated APIs in the future. Here we temporarily use macros.
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#if SOC_GDMA_SUPPORTED
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#if (SOC_GDMA_TRIG_PERIPH_SPI2_BUS == SOC_GDMA_BUS_AHB) && (SOC_AHB_GDMA_VERSION == 1)
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#include "soc/gdma_struct.h"
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#include "hal/gdma_ll.h"
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#define spi_dma_ll_rx_enable_burst_data(dev, chan, enable) gdma_ll_rx_enable_data_burst(&GDMA, chan, enable);
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#define spi_dma_ll_tx_enable_burst_data(dev, chan, enable) gdma_ll_tx_enable_data_burst(&GDMA, chan, enable);
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#define spi_dma_ll_rx_enable_burst_desc(dev, chan, enable) gdma_ll_rx_enable_descriptor_burst(&GDMA, chan, enable);
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#define spi_dma_ll_tx_enable_burst_desc(dev, chan, enable) gdma_ll_tx_enable_descriptor_burst(&GDMA, chan, enable);
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#define spi_dma_ll_enable_out_auto_wrback(dev, chan, enable) gdma_ll_tx_enable_auto_write_back(&GDMA, chan, enable);
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#define spi_dma_ll_set_out_eof_generation(dev, chan, enable) gdma_ll_tx_set_eof_mode(&GDMA, chan, enable);
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#elif (SOC_GDMA_TRIG_PERIPH_SPI2_BUS == SOC_GDMA_BUS_AXI) //TODO: IDF-6152, refactor spi hal layer
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#include "hal/axi_dma_ll.h"
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#define spi_dma_ll_rx_enable_burst_data(dev, chan, enable) axi_dma_ll_rx_enable_data_burst(&AXI_DMA, chan, enable);
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#define spi_dma_ll_tx_enable_burst_data(dev, chan, enable) axi_dma_ll_tx_enable_data_burst(&AXI_DMA, chan, enable);
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#define spi_dma_ll_rx_enable_burst_desc(dev, chan, enable) axi_dma_ll_rx_enable_descriptor_burst(&AXI_DMA, chan, enable);
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#define spi_dma_ll_tx_enable_burst_desc(dev, chan, enable) axi_dma_ll_tx_enable_descriptor_burst(&AXI_DMA, chan, enable);
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#define spi_dma_ll_enable_out_auto_wrback(dev, chan, enable) axi_dma_ll_tx_enable_auto_write_back(&AXI_DMA, chan, enable);
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#define spi_dma_ll_set_out_eof_generation(dev, chan, enable) axi_dma_ll_tx_set_eof_mode(&AXI_DMA, chan, enable);
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#endif
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#endif //SOC_GDMA_SUPPORTED
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static void s_spi_slave_hal_dma_init_config(const spi_slave_hal_context_t *hal)
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{
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spi_dma_ll_rx_enable_burst_data(hal->dma_in, hal->rx_dma_chan, 1);
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spi_dma_ll_tx_enable_burst_data(hal->dma_out, hal->tx_dma_chan, 1);
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spi_dma_ll_rx_enable_burst_desc(hal->dma_in, hal->rx_dma_chan, 1);
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spi_dma_ll_tx_enable_burst_desc(hal->dma_out, hal->tx_dma_chan, 1);
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}
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void spi_slave_hal_init(spi_slave_hal_context_t *hal, const spi_slave_hal_config_t *hal_config)
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{
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spi_dev_t *hw = SPI_LL_GET_HW(hal_config->host_id);
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hal->hw = hw;
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hal->dma_in = hal_config->dma_in;
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hal->dma_out = hal_config->dma_out;
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if (hal->use_dma) {
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s_spi_slave_hal_dma_init_config(hal);
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}
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spi_ll_slave_init(hal->hw);
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//Force a transaction done interrupt. This interrupt won't fire yet because we initialized the SPI interrupt as
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//disabled. This way, we can just enable the SPI interrupt and the interrupt handler will kick in, handling
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//any transactions that are queued.
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spi_ll_set_int_stat(hal->hw);
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spi_ll_enable_int(hal->hw);
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}
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void spi_slave_hal_setup_device(const spi_slave_hal_context_t *hal)
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{
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spi_ll_set_rx_lsbfirst(hal->hw, hal->rx_lsbfirst);
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spi_ll_set_tx_lsbfirst(hal->hw, hal->tx_lsbfirst);
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spi_ll_slave_set_mode(hal->hw, hal->mode, hal->use_dma);
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}
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void spi_slave_hal_deinit(spi_slave_hal_context_t *hal)
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{
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}
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