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774f010196
NOP instructions have been added in order to prevent the code from executing code it shouldn't execute. This is due to a delay between the moment an interrupt is requested and the moment it is fired. It only happens on RISC-V SoC.
406 lines
14 KiB
C
406 lines
14 KiB
C
/*
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FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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This file is part of the FreeRTOS distribution and was contributed
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to the project by Technolution B.V. (www.technolution.nl,
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freertos-riscv@technolution.eu) under the terms of the FreeRTOS
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contributors license.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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***************************************************************************
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>>! NOTE: The modification to the GPL is included to allow you to !<<
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>>! distribute a combined work that includes FreeRTOS without being !<<
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>>! obliged to provide the source code for proprietary components !<<
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>>! outside of the FreeRTOS kernel. !<<
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***************************************************************************
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available on the following
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link: http://www.freertos.org/a00114.html
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that is more than just the market leader, it *
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* is the industry's de facto standard. *
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* *
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* Help yourself get started quickly while simultaneously helping *
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* to support the FreeRTOS project by purchasing a FreeRTOS *
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* tutorial book, reference manual, or both: *
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* http://www.FreeRTOS.org/Documentation *
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* *
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***************************************************************************
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http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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the FAQ page "My application does not run, what could be wrong?". Have you
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defined configASSERT()?
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http://www.FreeRTOS.org/support - In return for receiving this top quality
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embedded software for free we request you assist our global community by
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participating in the support forum.
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http://www.FreeRTOS.org/training - Investing in training allows your team to
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be as productive as possible as early as possible. Now you can receive
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FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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Ltd, and the world's leading authority on the world's leading RTOS.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and commercial middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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/*-----------------------------------------------------------------------
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* Implementation of functions defined in portable.h for the RISC-V port.
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*----------------------------------------------------------------------*/
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#include <string.h>
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#include "FreeRTOS.h"
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#include "task.h"
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#include "portmacro.h"
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#include "sdkconfig.h"
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#include "soc/soc_caps.h"
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#include "soc/periph_defs.h"
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#include "soc/system_reg.h"
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#include "hal/systimer_hal.h"
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#include "hal/systimer_ll.h"
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#include "riscv/rvruntime-frames.h"
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#include "riscv/riscv_interrupts.h"
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#include "riscv/interrupt.h"
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#include "esp_system.h"
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#include "esp_intr_alloc.h"
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#include "esp_private/crosscore_int.h"
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#include "esp_attr.h"
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#include "esp_debug_helpers.h"
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#include "esp_log.h"
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#include "esp_private/pm_trace.h"
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/**
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* @brief A variable is used to keep track of the critical section nesting.
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* @note This variable has to be stored as part of the task context and must be initialized to a non zero value
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* to ensure interrupts don't inadvertently become unmasked before the scheduler starts.
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* As it is stored as part of the task context it will automatically be set to 0 when the first task is started.
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*/
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static UBaseType_t uxCriticalNesting = 0;
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static UBaseType_t uxSavedInterruptState = 0;
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BaseType_t uxSchedulerRunning = 0;
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UBaseType_t uxInterruptNesting = 0;
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BaseType_t xPortSwitchFlag = 0;
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__attribute__((aligned(16))) static StackType_t xIsrStack[configISR_STACK_SIZE];
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StackType_t *xIsrStackTop = &xIsrStack[0] + (configISR_STACK_SIZE & (~((portPOINTER_SIZE_TYPE)portBYTE_ALIGNMENT_MASK)));
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static const char *TAG = "cpu_start"; // [refactor-todo]: might be appropriate to change in the future, but
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static void vPortSysTickHandler(void *arg);
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static void vPortSetupTimer(void);
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static void prvTaskExitError(void);
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extern void esprv_intc_int_set_threshold(int); // FIXME, this function is in ROM only
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void vPortEnterCritical(void)
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{
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BaseType_t state = portENTER_CRITICAL_NESTED();
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uxCriticalNesting++;
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if (uxCriticalNesting == 1) {
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uxSavedInterruptState = state;
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}
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}
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void vPortExitCritical(void)
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{
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if (uxCriticalNesting > 0) {
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uxCriticalNesting--;
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if (uxCriticalNesting == 0) {
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portEXIT_CRITICAL_NESTED(uxSavedInterruptState);
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}
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}
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}
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/**
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* @brief Set up the systimer peripheral to generate the tick interrupt
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*
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*/
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void vPortSetupTimer(void)
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{
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/* set system timer interrupt vector */
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esp_err_t err = esp_intr_alloc(ETS_SYSTIMER_TARGET0_EDGE_INTR_SOURCE, ESP_INTR_FLAG_IRAM, vPortSysTickHandler, NULL, NULL);
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assert(err == ESP_OK);
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/* configure the timer */
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systimer_hal_init();
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systimer_hal_connect_alarm_counter(SYSTIMER_ALARM_0, SYSTIMER_COUNTER_1);
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systimer_hal_enable_counter(SYSTIMER_COUNTER_1);
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systimer_hal_counter_can_stall_by_cpu(SYSTIMER_COUNTER_1, 0, true);
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systimer_hal_set_alarm_period(SYSTIMER_ALARM_0, 1000000UL / CONFIG_FREERTOS_HZ);
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systimer_hal_select_alarm_mode(SYSTIMER_ALARM_0, SYSTIMER_ALARM_MODE_PERIOD);
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systimer_hal_enable_alarm_int(SYSTIMER_ALARM_0);
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}
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void prvTaskExitError(void)
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{
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/* A function that implements a task must not exit or attempt to return to
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its caller as there is nothing to return to. If a task wants to exit it
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should instead call vTaskDelete( NULL ).
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Artificially force an assert() to be triggered if configASSERT() is
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defined, then stop here so application writers can catch the error. */
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configASSERT(uxCriticalNesting == ~0UL);
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portDISABLE_INTERRUPTS();
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abort();
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}
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/* Clear current interrupt mask and set given mask */
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void vPortClearInterruptMask(int mask)
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{
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REG_WRITE(INTERRUPT_CORE0_CPU_INT_THRESH_REG, mask);
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/**
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* The delay between the moment we unmask the interrupt threshold register
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* and the moment the potential requested interrupt is triggered is not
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* null: up to three machine cycles/instructions can be executed.
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*
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* When compilation size optimization is enabled, this function and its
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* callers returning void will have NO epilogue, thus the instruction
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* following these calls will be executed.
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*
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* If the requested interrupt is a context switch to a higher priority
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* task then the one currently running, we MUST NOT execute any instruction
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* before the interrupt effectively happens.
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* In order to prevent this, force this routine to have a 3-instruction
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* delay before exiting.
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*/
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asm volatile ( "nop" );
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asm volatile ( "nop" );
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asm volatile ( "nop" );
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}
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/* Set interrupt mask and return current interrupt enable register */
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int vPortSetInterruptMask(void)
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{
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int ret;
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unsigned old_mstatus = RV_CLEAR_CSR(mstatus, MSTATUS_MIE);
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ret = REG_READ(INTERRUPT_CORE0_CPU_INT_THRESH_REG);
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REG_WRITE(INTERRUPT_CORE0_CPU_INT_THRESH_REG, RVHAL_EXCM_LEVEL);
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RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE);
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/**
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* In theory, this function should not return immediately as there is a
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* delay between the moment we mask the interrupt threshold register and
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* the moment a potential lower-priority interrupt is triggered (as said
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* above), it should have a delay of 2 machine cycles/instructions.
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*
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* However, in practice, this function has an epilogue of one instruction,
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* thus the instruction masking the interrupt threshold register is
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* followed by two instructions: `ret` and `csrrs` (RV_SET_CSR).
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* That's why we don't need any additional nop instructions here.
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*/
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return ret;
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}
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StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters)
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{
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extern uint32_t __global_pointer$;
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uint8_t* task_thread_local_start;
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uint8_t* threadptr;
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extern char _thread_local_start, _thread_local_end, _rodata_start;
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/* Byte pointer, so that subsequent calculations don't depend on sizeof(StackType_t). */
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uint8_t* sp = (uint8_t*) pxTopOfStack;
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/* Set up TLS area */
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uint32_t thread_local_sz = (uint32_t) (&_thread_local_end - &_thread_local_start);
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thread_local_sz = ALIGNUP(0x10, thread_local_sz);
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sp -= thread_local_sz;
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task_thread_local_start = sp;
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memcpy(task_thread_local_start, &_thread_local_start, thread_local_sz);
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threadptr = task_thread_local_start - (&_thread_local_start - &_rodata_start);
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/* Simulate the stack frame as it would be created by a context switch interrupt. */
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sp -= RV_STK_FRMSZ;
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RvExcFrame *frame = (RvExcFrame *)sp;
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memset(frame, 0, sizeof(*frame));
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frame->ra = (UBaseType_t)prvTaskExitError;
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frame->mepc = (UBaseType_t)pxCode;
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frame->a0 = (UBaseType_t)pvParameters;
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frame->gp = (UBaseType_t)&__global_pointer$;
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frame->tp = (UBaseType_t)threadptr;
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//TODO: IDF-2393
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return (StackType_t *)frame;
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}
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IRAM_ATTR void vPortSysTickHandler(void *arg)
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{
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(void)arg;
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systimer_ll_clear_alarm_int(SYSTIMER_ALARM_0);
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#ifdef CONFIG_PM_TRACE
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ESP_PM_TRACE_ENTER(TICK, xPortGetCoreID());
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#endif
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if (!uxSchedulerRunning) {
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return;
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}
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if (xTaskIncrementTick() != pdFALSE) {
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vPortYieldFromISR();
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}
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#ifdef CONFIG_PM_TRACE
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ESP_PM_TRACE_EXIT(TICK, xPortGetCoreID());
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#endif
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}
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BaseType_t xPortStartScheduler(void)
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{
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uxInterruptNesting = 0;
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uxCriticalNesting = 0;
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uxSchedulerRunning = 0;
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vPortSetupTimer();
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esprv_intc_int_set_threshold(1); /* set global INTC masking level */
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riscv_global_interrupts_enable();
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vPortYield();
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/*Should not get here*/
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return pdFALSE;
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}
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void vPortEndScheduler(void)
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{
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/* very unlikely this function will be called, so just trap here */
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abort();
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}
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void vPortYieldOtherCore(BaseType_t coreid)
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{
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esp_crosscore_int_send_yield(coreid);
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}
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void vPortYieldFromISR( void )
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{
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uxSchedulerRunning = 1;
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xPortSwitchFlag = 1;
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}
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void vPortYield(void)
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{
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if (uxInterruptNesting) {
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vPortYieldFromISR();
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} else {
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esp_crosscore_int_send_yield(0);
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/* There are 3-4 instructions of latency between triggering the software
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interrupt and the CPU interrupt happening. Make sure it happened before
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we return, otherwise vTaskDelay() may return and execute 1-2
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instructions before the delay actually happens.
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(We could use the WFI instruction here, but there is a chance that
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the interrupt will happen while evaluating the other two conditions
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for an instant yield, and if that happens then the WFI would be
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waiting for the next interrupt to occur...)
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*/
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while (uxSchedulerRunning && uxCriticalNesting == 0 && REG_READ(SYSTEM_CPU_INTR_FROM_CPU_0_REG) != 0) {}
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}
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}
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#define STACK_WATCH_AREA_SIZE 32
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#define STACK_WATCH_POINT_NUMBER (SOC_CPU_WATCHPOINTS_NUM - 1)
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void vPortSetStackWatchpoint(void *pxStackStart)
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{
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uint32_t addr = (uint32_t)pxStackStart;
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addr = (addr + (STACK_WATCH_AREA_SIZE - 1)) & (~(STACK_WATCH_AREA_SIZE - 1));
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esp_set_watchpoint(STACK_WATCH_POINT_NUMBER, (char *)addr, STACK_WATCH_AREA_SIZE, ESP_WATCHPOINT_STORE);
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}
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uint32_t xPortGetTickRateHz(void) {
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return (uint32_t)configTICK_RATE_HZ;
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}
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BaseType_t xPortInIsrContext(void)
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{
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return uxInterruptNesting;
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}
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BaseType_t IRAM_ATTR xPortInterruptedFromISRContext(void)
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{
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/* For single core, this can be the same as xPortInIsrContext() because reading it is atomic */
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return uxInterruptNesting;
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}
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void vPortCPUInitializeMutex(portMUX_TYPE *mux)
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{
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(void)mux; //TODO: IDF-2393
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}
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void vPortCPUAcquireMutex(portMUX_TYPE *mux)
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{
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(void)mux; //TODO: IDF-2393
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}
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bool vPortCPUAcquireMutexTimeout(portMUX_TYPE *mux, int timeout_cycles)
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{
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(void)mux; //TODO: IDF-2393
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(void)timeout_cycles;
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return true;
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}
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void vPortCPUReleaseMutex(portMUX_TYPE *mux)
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{
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(void)mux; //TODO: IDF-2393
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}
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void __attribute__((weak)) vApplicationStackOverflowHook(TaskHandle_t xTask, char *pcTaskName)
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{
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#define ERR_STR1 "***ERROR*** A stack overflow in task "
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#define ERR_STR2 " has been detected."
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const char *str[] = {ERR_STR1, pcTaskName, ERR_STR2};
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char buf[sizeof(ERR_STR1) + CONFIG_FREERTOS_MAX_TASK_NAME_LEN + sizeof(ERR_STR2) + 1 /* null char */] = {0};
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char *dest = buf;
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for (int i = 0; i < sizeof(str) / sizeof(str[0]); i++) {
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dest = strcat(dest, str[i]);
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}
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esp_system_abort(buf);
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}
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extern void esp_startup_start_app_common(void);
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void esp_startup_start_app(void)
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{
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esp_startup_start_app_common();
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ESP_LOGI(TAG, "Starting scheduler.");
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vTaskStartScheduler();
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}
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