mirror of
https://github.com/espressif/esp-idf.git
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3c9856bdd1
Adding prop and lit sections to the ELF will let the debugger and the disassembler have more info about data bytes present in the middle of the Xtensa instructions, usually used for padding.
213 lines
7.0 KiB
Plaintext
213 lines
7.0 KiB
Plaintext
/*
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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Linker file used to link the bootloader.
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*/
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/* Simplified memory map for the bootloader
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The main purpose is to make sure the bootloader can load into main memory
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without overwriting itself.
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*/
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MEMORY
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{
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/* IRAM POOL1, used for APP CPU cache. Bootloader runs from here during the final stage of loading the app because APP CPU is still held in reset, the main app enables APP CPU cache */
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iram_loader_seg (RWX) : org = 0x40078000, len = 0x8000 /* 32KB, APP CPU cache */
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/* 63kB, IRAM. We skip the first 1k to prevent the entry point being
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placed into the same range as exception vectors in the app.
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This leads to idf_monitor decoding ROM bootloader "entry 0x40080xxx"
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message as one of the exception vectors, which looks scary to users.
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*/
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iram_seg (RWX) : org = 0x40080400, len = 0xfc00
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/* 64k at the end of DRAM, after ROM bootloader stack */
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dram_seg (RW) : org = 0x3FFF0000, len = 0x10000
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}
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/* Default entry point: */
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ENTRY(call_start_cpu0);
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SECTIONS
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{
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.iram_loader.text :
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{
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. = ALIGN (16);
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_loader_text_start = ABSOLUTE(.);
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*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
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*liblog.a:(.literal .text .literal.* .text.*)
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*libgcc.a:(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
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*libesp_common.a:fpga_overrides.*(.literal.bootloader_fill_random .text.bootloader_fill_random)
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*libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_soc.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
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*libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
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*libspi_flash.a:*.*(.literal .text .literal.* .text.*)
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*libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
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*libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
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*libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
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*libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
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*libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
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*libefuse.a:*.*(.literal .text .literal.* .text.*)
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*libesp_rom.a:*.*(.literal .text .literal.* .text.*)
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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_loader_text_end = ABSOLUTE(.);
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} > iram_loader_seg
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.iram.text :
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{
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. = ALIGN (16);
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*(.entry.text)
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*(.init.literal)
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*(.init)
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} > iram_seg
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/* Shared RAM */
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.dram0.bss (NOLOAD) :
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{
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. = ALIGN (8);
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_dram_start = ABSOLUTE(.);
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_bss_start = ABSOLUTE(.);
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*(.dynsbss)
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*(.sbss)
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
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*(.scommon)
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*(.sbss2)
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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*(.dynbss)
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*(.bss)
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*(.bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN (8);
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_bss_end = ABSOLUTE(.);
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} >dram_seg
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.dram0.data :
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{
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_data_start = ABSOLUTE(.);
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d.*)
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*(.data1)
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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*(.gnu.linkonce.s2.*)
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*(.jcr)
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_data_end = ABSOLUTE(.);
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} >dram_seg
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.dram0.rodata :
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{
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_rodata_start = ABSOLUTE(.);
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*(.rodata)
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*(.rodata.*)
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*(.gnu.linkonce.r.*)
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*(.rodata1)
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*(.sdata2 .sdata2.*)
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__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
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*(.xt_except_table)
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*(.gcc_except_table)
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*(.gnu.linkonce.e.*)
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*(.gnu.version_r)
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*(.eh_frame)
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. = (. + 3) & ~ 3;
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/* C++ constructor and destructor tables, properly ordered: */
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__init_array_start = ABSOLUTE(.);
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KEEP (*crtbegin.*(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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__init_array_end = ABSOLUTE(.);
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KEEP (*crtbegin.*(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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/* C++ exception handlers table: */
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__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
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*(.xt_except_desc)
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*(.gnu.linkonce.h.*)
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__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
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*(.xt_except_desc_end)
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*(.dynamic)
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*(.gnu.version_d)
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_rodata_end = ABSOLUTE(.);
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/* Literals are also RO data. */
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_lit4_start = ABSOLUTE(.);
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*(*.lit4)
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*(.lit4.*)
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*(.gnu.linkonce.lit4.*)
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_lit4_end = ABSOLUTE(.);
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. = ALIGN(4);
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_dram_end = ABSOLUTE(.);
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} >dram_seg
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.iram.text :
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{
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_stext = .;
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_text_start = ABSOLUTE(.);
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*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.iram .iram.*) /* catch stray IRAM_ATTR */
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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/** CPU will try to prefetch up to 16 bytes of
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* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
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* safe access to up to 16 bytes after the last real instruction, add
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* dummy bytes to ensure this
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*/
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. += 16;
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_text_end = ABSOLUTE(.);
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_etext = .;
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} > iram_seg
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/** This section will be used by the debugger and disassembler to get more information
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* about raw data present in the code.
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* Indeed, it may be required to add some padding at some points in the code
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* in order to align a branch/jump destination on a particular bound.
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* Padding these instructions will generate null bytes that shall be
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* interpreted as data, and not code by the debugger or disassembler.
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* This section will only be present in the ELF file, not in the final binary
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* For more details, check GCC-212
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*/
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.xt.prop 0 :
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{
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KEEP (*(.xt.prop .gnu.linkonce.prop.*))
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}
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.xt.lit 0 :
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{
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KEEP (*(.xt.lit .gnu.linkonce.p.*))
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}
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}
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