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https://github.com/espressif/esp-idf.git
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94597fc8e3
If esp_restart_noos() is run and the stack address points to external memory (SPIRAM) then Cache_Read_Disable() raises up the error "Cache disabled but cached memory region accessed" to fix this we switch stack to internal RAM before disable cache. Added unit tests. Closes: https://github.com/espressif/esp-idf/issues/5107
99 lines
3.0 KiB
C
99 lines
3.0 KiB
C
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#define RSR(reg, at) asm volatile ("rsr %0, %1" : "=r" (at) : "i" (reg))
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#define WSR(reg, at) asm volatile ("wsr %0, %1" : : "r" (at), "i" (reg))
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#define XSR(reg, at) asm volatile ("xsr %0, %1" : "+r" (at) : "i" (reg))
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#define RER(reg, at) asm volatile ("rer %0, %1" : "=r" (at) : "r" (reg))
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#define WITLB(at, as) asm volatile ("witlb %0, %1; \n isync \n " : : "r" (at), "r" (as))
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#define WDTLB(at, as) asm volatile ("wdtlb %0, %1; \n dsync \n " : : "r" (at), "r" (as))
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/* The SET_STACK implements a setting a new stack pointer (sp or a1).
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* to do this the need reset PS_WOE, reset WINDOWSTART, update SP, and return PS_WOE.
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*
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* Note: It has 2 implementations one for using in assembler files (*.S) and one for using in C.
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*
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* C code prototype for SET_STACK:
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* uint32_t ps_reg;
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* uint32_t w_base;
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* RSR(PS, ps_reg);
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* ps_reg &= ~(PS_WOE_MASK | PS_OWB_MASK | PS_CALLINC_MASK);
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* WSR(PS, ps_reg);
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*
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* RSR(WINDOWBASE, w_base);
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* WSR(WINDOWSTART, (1 << w_base));
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*
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* asm volatile ( "movi sp, "XTSTR( (SOC_DRAM_LOW + (SOC_DRAM_HIGH - SOC_DRAM_LOW) / 2) )"");
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*
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* RSR(PS, ps_reg);
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* ps_reg |= (PS_WOE_MASK);
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* WSR(PS, ps_reg);
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*/
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#ifdef __ASSEMBLER__
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.macro SET_STACK new_sp tmp1 tmp2
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rsr.ps \tmp1
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movi \tmp2, ~(PS_WOE_MASK | PS_OWB_MASK | PS_CALLINC_MASK)
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and \tmp1, \tmp1, \tmp2
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wsr.ps \tmp1
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rsync
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rsr.windowbase \tmp1
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ssl \tmp1
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movi \tmp1, 1
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sll \tmp1, \tmp1
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wsr.windowstart \tmp1
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rsync
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mov sp, \new_sp
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rsr.ps \tmp1
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movi \tmp2, (PS_WOE)
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or \tmp1, \tmp1, \tmp2
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wsr.ps \tmp1
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rsync
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.endm
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#else
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#define SET_STACK(new_sp) \
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do { \
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uint32_t tmp1 = 0, tmp2 = 0; \
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asm volatile ( \
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"rsr.ps %1 \n"\
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"movi %2, ~" XTSTR( PS_WOE_MASK | PS_OWB_MASK | PS_CALLINC_MASK ) " \n"\
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"and %1, %1, %2 \n"\
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"wsr.ps %1 \n"\
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"rsync \n"\
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" \n"\
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"rsr.windowbase %1 \n"\
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"ssl %1 \n"\
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"movi %1, 1 \n"\
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"sll %1, %1 \n"\
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"wsr.windowstart %1 \n"\
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"rsync \n"\
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" \n"\
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"mov sp, %0 \n"\
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"rsr.ps %1 \n"\
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" \n"\
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"movi %2, " XTSTR( PS_WOE_MASK ) "\n"\
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" \n"\
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"or %1, %1, %2 \n"\
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"wsr.ps %1 \n"\
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"rsync \n"\
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: "+r"(new_sp), "+r"(tmp1), "+r"(tmp2)); \
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} while (0);
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#endif // __ASSEMBLER__
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