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352 lines
16 KiB
Plaintext
352 lines
16 KiB
Plaintext
menu "Main Flash configuration"
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depends on !APP_BUILD_TYPE_PURE_RAM_APP
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menu "Optional and Experimental Features (READ DOCS FIRST)"
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comment "Features here require specific hardware (READ DOCS FIRST!)"
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config SPI_FLASH_UNDER_HIGH_FREQ
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bool
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default y if ESPTOOLPY_FLASHFREQ_120M
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help
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This is a helper config for HPM. Invisible for users.
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choice SPI_FLASH_HPM
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prompt "High Performance Mode (READ DOCS FIRST, > 80MHz)"
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# Currently, only esp32s3 allows high performance mode.
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depends on IDF_TARGET_ESP32S3 && !ESPTOOLPY_OCT_FLASH
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default SPI_FLASH_HPM_AUTO
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help
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Whether the High Performance Mode of Flash is enabled. As an optional feature, user needs to manually
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enable this option as a confirmation. To be back-compatible with earlier IDF versionn, this option is
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automatically enabled with warning when Flash running > 80Mhz.
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config SPI_FLASH_HPM_ENA
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# Not using name of SPI_FLASH_HPM_ENABLE because it was used as an invisible option and we don't want
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# to inherit the value of that one
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bool "Enable"
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config SPI_FLASH_HPM_AUTO
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bool "Auto (Not recommended)"
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config SPI_FLASH_HPM_DIS
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bool "Disabled"
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endchoice
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config SPI_FLASH_HPM_ON
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bool
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# For ESP32-S3, it's enabled by default. For later chips it should be disabled by default
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default y if SPI_FLASH_HPM_ENA || (IDF_TARGET_ESP32S3 && SPI_FLASH_HPM_AUTO)
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help
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This option is invisible, and will be selected automatically
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when ``ESPTOOLPY_FLASHFREQ_120M`` is selected.
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choice SPI_FLASH_HPM_DC
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prompt "Support HPM using DC (READ DOCS FIRST)"
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depends on SPI_FLASH_HPM_ON
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default SPI_FLASH_HPM_DC_AUTO
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help
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This feature needs your bootloader to be compiled DC-aware (BOOTLOADER_FLASH_DC_AWARE=y). Otherwise the
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chip will not be able to boot after a reset.
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config SPI_FLASH_HPM_DC_AUTO
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bool "Auto (Enable when bootloader support enabled (BOOTLOADER_FLASH_DC_AWARE))"
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config SPI_FLASH_HPM_DC_DISABLE
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bool "Disable (READ DOCS FIRST)"
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endchoice
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config SPI_FLASH_HPM_DC_ON
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bool
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default y if SPI_FLASH_HPM_DC_AUTO && BOOTLOADER_FLASH_DC_AWARE
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help
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This is a helper config for HPM. Whether HPM-DC is enabled is also determined by bootloader.
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Invisible for users.
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config SPI_FLASH_AUTO_SUSPEND
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bool "Auto suspend long erase/write operations (READ DOCS FIRST)"
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default n
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depends on IDF_TARGET_ESP32C3 && !SPI_FLASH_USE_LEGACY_IMPL && !SPI_FLASH_ROM_IMPL
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help
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This option is disabled by default because it is supported only
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for specific flash chips and for specific Espressif chips.
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To evaluate if you can use this feature refer to
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`Optional Features for Flash` > `Auto Suspend & Resume` of the `ESP-IDF Programming Guide`.
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CAUTION: If you want to OTA to an app with this feature turned on, please make
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sure the bootloader has the support for it. (later than IDF v4.3)
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If you are using an official Espressif module, please contact Espressif Business support
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to check if the module has the flash that support this feature installed.
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Also refer to `Concurrency Constraints for Flash on SPI1` > `Flash Auto Suspend Feature`
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before enabling this option.
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endmenu
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endmenu
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menu "SPI Flash driver"
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config SPI_FLASH_VERIFY_WRITE
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bool "Verify SPI flash writes"
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default n
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help
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If this option is enabled, any time SPI flash is written then the data will be read
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back and verified. This can catch hardware problems with SPI flash, or flash which
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was not erased before verification.
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config SPI_FLASH_LOG_FAILED_WRITE
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bool "Log errors if verification fails"
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depends on SPI_FLASH_VERIFY_WRITE
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default n
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help
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If this option is enabled, if SPI flash write verification fails then a log error line
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will be written with the address, expected & actual values. This can be useful when
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debugging hardware SPI flash problems.
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config SPI_FLASH_WARN_SETTING_ZERO_TO_ONE
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bool "Log warning if writing zero bits to ones"
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depends on SPI_FLASH_VERIFY_WRITE
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default n
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help
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If this option is enabled, any SPI flash write which tries to set zero bits in the flash to
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ones will log a warning. Such writes will not result in the requested data appearing identically
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in flash once written, as SPI NOR flash can only set bits to one when an entire sector is erased.
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After erasing, individual bits can only be written from one to zero.
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Note that some software (such as SPIFFS) which is aware of SPI NOR flash may write one bits as an
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optimisation, relying on the data in flash becoming a bitwise AND of the new data and any existing data.
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Such software will log spurious warnings if this option is enabled.
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config SPI_FLASH_ENABLE_COUNTERS
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bool "Enable operation counters"
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default 0
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help
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This option enables the following APIs:
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- spi_flash_reset_counters
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- spi_flash_dump_counters
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- spi_flash_get_counters
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These APIs may be used to collect performance data for spi_flash APIs
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and to help understand behaviour of libraries which use SPI flash.
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config SPI_FLASH_ROM_DRIVER_PATCH
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bool "Enable SPI flash ROM driver patched functions"
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default y
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help
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Enable this flag to use patched versions of SPI flash ROM driver functions.
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This option should be enabled, if any one of the following is true: (1) need to write
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to flash on ESP32-D2WD; (2) main SPI flash is connected to non-default pins; (3) main
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SPI flash chip is manufactured by ISSI.
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config SPI_FLASH_ROM_IMPL
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bool "Use esp_flash implementation in ROM"
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depends on IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C3
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default n
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help
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Enable this flag to use new SPI flash driver functions from ROM instead of ESP-IDF.
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If keeping this as "n" in your project, you will have less free IRAM.
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But you can use all of our flash features.
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If making this as "y" in your project, you will increase free IRAM.
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But you may miss out on some flash features and support for new flash chips.
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Currently the ROM cannot support the following features:
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- SPI_FLASH_AUTO_SUSPEND (C3, S3)
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choice SPI_FLASH_DANGEROUS_WRITE
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bool "Writing to dangerous flash regions"
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default SPI_FLASH_DANGEROUS_WRITE_ABORTS
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help
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SPI flash APIs can optionally abort or return a failure code
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if erasing or writing addresses that fall at the beginning
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of flash (covering the bootloader and partition table) or that
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overlap the app partition that contains the running app.
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It is not recommended to ever write to these regions from an IDF app,
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and this check prevents logic errors or corrupted firmware memory from
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damaging these regions.
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Note that this feature *does not* check calls to the esp_rom_xxx SPI flash
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ROM functions. These functions should not be called directly from IDF
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applications.
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config SPI_FLASH_DANGEROUS_WRITE_ABORTS
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bool "Aborts"
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config SPI_FLASH_DANGEROUS_WRITE_FAILS
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bool "Fails"
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config SPI_FLASH_DANGEROUS_WRITE_ALLOWED
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bool "Allowed"
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endchoice
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config SPI_FLASH_USE_LEGACY_IMPL
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bool "Use the legacy implementation before IDF v4.0"
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default n
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help
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The implementation of SPI flash has been greatly changed in IDF v4.0.
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Enable this option to use the legacy implementation.
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config SPI_FLASH_SHARE_SPI1_BUS
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bool "Support other devices attached to SPI1 bus"
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default n
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# The bus lock on SPI1 is meaningless when the legacy implementation is used, or the SPI
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# driver does not support SPI1.
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depends on !SPI_FLASH_USE_LEGACY_IMPL && !IDF_TARGET_ESP32S2
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help
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Each SPI bus needs a lock for arbitration among devices. This allows multiple
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devices on a same bus, but may reduce the speed of esp_flash driver access to the
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main flash chip.
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If you only need to use esp_flash driver to access the main flash chip, disable
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this option, and the lock will be bypassed on SPI1 bus. Otherwise if extra devices
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are needed to attach to SPI1 bus, enable this option.
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config SPI_FLASH_BYPASS_BLOCK_ERASE
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bool "Bypass a block erase and always do sector erase"
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default n
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help
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Some flash chips can have very high "max" erase times, especially for block erase (32KB or 64KB).
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This option allows to bypass "block erase" and always do sector erase commands.
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This will be much slower overall in most cases, but improves latency for other code to run.
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config SPI_FLASH_YIELD_DURING_ERASE
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bool "Enables yield operation during flash erase"
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default y
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help
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This allows to yield the CPUs between erase commands.
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Prevents starvation of other tasks.
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config SPI_FLASH_ERASE_YIELD_DURATION_MS
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int "Duration of erasing to yield CPUs (ms)"
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depends on SPI_FLASH_YIELD_DURING_ERASE
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default 20
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help
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If a duration of one erase command is large
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then it will yield CPUs after finishing a current command.
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config SPI_FLASH_ERASE_YIELD_TICKS
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int "CPU release time (tick) for an erase operation"
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depends on SPI_FLASH_YIELD_DURING_ERASE
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default 1
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help
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Defines how many ticks will be before returning to continue a erasing.
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config SPI_FLASH_WRITE_CHUNK_SIZE
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int "Flash write chunk size"
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default 8192
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range 256 8192
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help
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Flash write is broken down in terms of multiple (smaller) write operations.
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This configuration options helps to set individual write chunk size, smaller
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value here ensures that cache (and non-IRAM resident interrupts) remains
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disabled for shorter duration.
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config SPI_FLASH_SIZE_OVERRIDE
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bool "Override flash size in bootloader header by ESPTOOLPY_FLASHSIZE"
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default n
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help
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SPI Flash driver uses the flash size configured in bootloader header by default.
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Enable this option to override flash size with latest ESPTOOLPY_FLASHSIZE value from
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the app header if the size in the bootloader header is incorrect.
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config SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED
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bool "Flash timeout checkout disabled"
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depends on !SPI_FLASH_USE_LEGACY_IMPL
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default n
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help
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This option is helpful if you are using a flash chip whose timeout is quite large or unpredictable.
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config SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST
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bool "Override default chip driver list"
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depends on !SPI_FLASH_USE_LEGACY_IMPL
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default n
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help
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This option allows the chip driver list to be customized, instead of using the default list provided by
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ESP-IDF.
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When this option is enabled, the default list is no longer compiled or linked. Instead, the
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`default_registered_chips` structure must be provided by the user.
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See example: custom_chip_driver under examples/storage for more details.
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menu "Auto-detect flash chips"
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visible if !SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST
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config SPI_FLASH_SUPPORT_ISSI_CHIP
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bool "ISSI"
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default y
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help
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Enable this to support auto detection of ISSI chips if chip vendor not directly
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given by ``chip_drv`` member of the chip struct. This adds support for variant
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chips, however will extend detecting time.
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config SPI_FLASH_SUPPORT_MXIC_CHIP
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bool "MXIC"
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default y
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help
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Enable this to support auto detection of MXIC chips if chip vendor not directly
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given by ``chip_drv`` member of the chip struct. This adds support for variant
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chips, however will extend detecting time.
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config SPI_FLASH_SUPPORT_GD_CHIP
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bool "GigaDevice"
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default y
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help
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Enable this to support auto detection of GD (GigaDevice) chips if chip vendor not
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directly given by ``chip_drv`` member of the chip struct. If you are using Wrover
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modules, please don't disable this, otherwise your flash may not work in 4-bit
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mode.
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This adds support for variant chips, however will extend detecting time and image
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size. Note that the default chip driver supports the GD chips with product ID
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60H.
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config SPI_FLASH_SUPPORT_WINBOND_CHIP
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bool "Winbond"
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default y
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help
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Enable this to support auto detection of Winbond chips if chip vendor not directly
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given by ``chip_drv`` member of the chip struct. This adds support for variant
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chips, however will extend detecting time.
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config SPI_FLASH_SUPPORT_BOYA_CHIP
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bool "BOYA"
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# ESP32 doens't usually use this chip, default n to save iram.
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default n if IDF_TARGET_ESP32
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default y
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help
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Enable this to support auto detection of BOYA chips if chip vendor not directly
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given by ``chip_drv`` member of the chip struct. This adds support for variant
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chips, however will extend detecting time.
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config SPI_FLASH_SUPPORT_TH_CHIP
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bool "TH"
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# ESP32 doens't usually use this chip, default n to save iram.
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default n if IDF_TARGET_ESP32
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default y
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help
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Enable this to support auto detection of TH chips if chip vendor not directly
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given by ``chip_drv`` member of the chip struct. This adds support for variant
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chips, however will extend detecting time.
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config SPI_FLASH_SUPPORT_MXIC_OPI_CHIP
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bool "mxic (opi)"
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depends on IDF_TARGET_ESP32S3
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default y
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help
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Enable this to support auto detection of Octal MXIC chips if chip vendor not directly
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given by ``chip_drv`` member of the chip struct. This adds support for variant
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chips, however will extend detecting time.
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endmenu #auto detect flash chips
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config SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE
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bool "Enable encrypted partition read/write operations"
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default y
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help
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This option enables flash read/write operations to encrypted partition/s. This option
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is kept enabled irrespective of state of flash encryption feature. However, in case
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application is not using flash encryption feature and is in need of some additional
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memory from IRAM region (~1KB) then this config can be disabled.
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endmenu
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