esp-idf/components/soc/src
Darian Leung fb2d6a44eb CAN: ISR runs when cache is disabled
This commit adds the feature where the CAN ISR will continue to
run even if the cache is disabled. Whilst cache is disabled, any
received messages will go into the RX queue, and any pending TX
messages in the TX queue will be transmitted. This feature should
be enabled using the CONFIG_CAN_ISR_IN_IRAM option.
2021-03-09 08:47:58 +08:00
..
hal CAN: ISR runs when cache is disabled 2021-03-09 08:47:58 +08:00
lldesc.c spi_master: refactor and add HAL support 2019-03-28 17:14:50 +08:00
memory_layout_utils.c Merge branch 'master' into feature/esp32s2beta_merge 2019-10-02 19:01:39 +02:00
soc_include_legacy_warn.c global: move the soc component out of the common list 2019-04-16 13:21:15 +08:00