Sudeep Mohanty 099f648686 ulp-riscv: ULP RISC-V I2C example gets stuck on esp32s2 ... This commit fixes an issue where in the ULP RISC-V I2C example causes a spurious wakeup of the main CPU because of a Trap signal when the ULP core does not meet the wakeup threshold values. This was due to the fact that the RTC_CNTL_COCPU_DONE signal was being set before the RTC_CNTL_COCPU_SHUT_RESET_EN signal which was causing the the ULP RISC-V core to not reset properly on each cycle. Closes https://github.com/espressif/esp-idf/issues/10301		2022-12-27 07:44:26 +00:00
..
adc	system: fix printf format errors in all system and cxx examples	2022-12-12 12:55:02 +08:00
ds18b20_onewire	re-enable riscv ulp gpio support and examples	2022-06-08 17:59:28 +08:00
gpio	ci: remove temp deepsleep tag runner	2022-07-19 12:12:46 +08:00
gpio_interrupt	re-enable riscv ulp gpio support and examples	2022-06-08 17:59:28 +08:00
i2c	ulp-riscv: ULP RISC-V I2C example gets stuck on esp32s2	2022-12-27 07:44:26 +00:00
uart_print	Add ULP-RISCV print and bitbanged UART tx API	2022-07-29 12:18:01 +08:00