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esp-idf/components/espcoredump/include_core_dump
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Sachin Parekh e0fc13b23d coredump: Parse backtrace info for RISCV 
For RISCV, backtrace generation on device is not possible without
including and parsing DWARF sections. We extract the crash task stack
and let the host generate the backtrace
2022-02-01 17:52:13 +05:30
..
port espcoredump: code refactoring and add support for RISC-V implemetation 2021-03-10 12:19:00 +08:00
core_dump_binary.h espcoredump: code refactoring and add support for RISC-V implemetation 2021-03-10 12:19:00 +08:00
core_dump_checksum.h espcoredump: code refactoring and add support for RISC-V implemetation 2021-03-10 12:19:00 +08:00
core_dump_elf.h espcoredump: code refactoring and add support for RISC-V implemetation 2021-03-10 12:19:00 +08:00
elf.h Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
esp_core_dump_common.h espcoredump: code refactoring and add support for RISC-V implemetation 2021-03-10 12:19:00 +08:00
esp_core_dump_port.h coredump: Parse backtrace info for RISCV 2022-02-01 17:52:13 +05:30
esp_core_dump_types.h espcoredump: code refactoring and add support for RISC-V implemetation 2021-03-10 12:19:00 +08:00