Marius Vikhammer be839733ed fix(interrupt): fixed exit critical section on P4/C5 ... When adjusting the interrupt level treshold on P4/C6 during a critical section exit it would take a few cycles before this is taken into account by the CPU. This meant that under some circumstances, e.g. 02, we could do yield()->vPortExitCritical()->vPortEnterCritical() without getting rescheduled. This causes issues for freertos as it assumes the task will not continue into the vPortEnterCritical before the scheduler has schedulded it again. This meant that e.g. xTaskNotifyWait would yield, but then immeditaly continue as if it was already notified.		2024-03-24 13:13:42 +08:00
..
esp_private	refactor(riscv): added a new API for the interrupts	2024-01-18 16:36:53 +08:00
riscv	fix(interrupt): fixed exit critical section on P4/C5	2024-03-24 13:13:42 +08:00