Sudeep Mohanty 662e0812f4 ulp-riscv-i2c: Add ULP RISC-V I2C read/write timeout config option ... The commit 88e4c06028 introduced a loop timeout for all ULP RISC-V I2C transactions to avoid getting stuck in a forever loop. The loop timeout was set to 500 msec by default. This commit improves on the concept by making the loop timeout configurable via a Kconfig option in terms of CPU ticks. If the timeout is set to -1 value then the transaction loops will never timeout, therefore restoring the driver behavior before the timeout was introduced. The commit also updates the I2C Fast mode timings for esp32s2 which need to be adjusted due to bus timing constraints. Closes https://github.com/espressif/esp-idf/issues/11154		2023-05-09 11:17:01 +02:00
..
include	ulp: added sleep support for lp core	2023-04-25 11:51:35 +08:00
start.S	ulp-riscv: add support for using ADC as well as an example show-casing it.	2022-07-11 09:31:22 +08:00
ulp_riscv_adc.c	ulp: migrate tests to pytest embedded	2022-08-03 09:36:17 +08:00
ulp_riscv_i2c.c	ulp-riscv-i2c: Add ULP RISC-V I2C read/write timeout config option	2023-05-09 11:17:01 +02:00
ulp_riscv_lock.c	ulp-riscv: added lock API to provide mutual exclusion when sharing variables between the main CPU and the ULP.	2022-08-05 18:16:31 +08:00
ulp_riscv_print.c	Add ULP-RISCV print and bitbanged UART tx API	2022-07-29 12:18:01 +08:00
ulp_riscv_uart.c	Add ULP-RISCV print and bitbanged UART tx API	2022-07-29 12:18:01 +08:00
ulp_riscv_utils.c	ulp-riscv: ULP RISC-V I2C example gets stuck on esp32s2	2022-12-27 07:44:26 +00:00