Ivan Grokhotkov 7a527896dc ulp: use timer to start ULP, fix I_ANDI bug, add tests ... Starting the ULP using SENS_SAR_START_FORCE_REG doesn’t disable clock gating of RTC fast clock. When SoC goes into deep sleep mode, RTC fast clock gets gated, so ULP can no longer run. Instead, it has to be started using the timer (RTC_CNTL_ULP_CP_SLP_TIMER_EN bit). When ULP is enabled by the timer, clock also gets enabled.		2016-12-16 20:25:38 +08:00
..
component.mk	ulp: add missing component.mk for tests	2016-12-16 14:30:27 +08:00
test_ulp.c	ulp: use timer to start ULP, fix I_ANDI bug, add tests	2016-12-16 20:25:38 +08:00