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89 lines
2.8 KiB
Makefile
89 lines
2.8 KiB
Makefile
# Functionality common to both top-level project makefile (project.mk)
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# and component makefiles (component_wrapper.mk)
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#
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# Include project config makefile, if it exists.
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#
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# (Note that we only rebuild this makefile automatically for some
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# targets, see project_config.mk for details.)
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SDKCONFIG_MAKEFILE ?= $(abspath $(BUILD_DIR_BASE)/include/config/auto.conf)
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-include $(SDKCONFIG_MAKEFILE)
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export SDKCONFIG_MAKEFILE # sub-makes (like bootloader) will reuse this path
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# BATCH_BUILD flag disables interactive terminal features, defaults to verbose build
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ifdef BATCH_BUILD
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V ?= 1
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endif
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#Handling of V=1/VERBOSE=1 flag
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#
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# if V=1, $(summary) does nothing and $(details) will echo extra details
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# if V is unset or not 1, $(summary) echoes a summary and $(details) does nothing
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VERBOSE ?=
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V ?= $(VERBOSE)
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ifeq ("$(V)","1")
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summary := @true
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details := @echo
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else
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summary := @echo
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details := @true
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# disable echoing of commands, directory names
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MAKEFLAGS += --silent
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endif # $(V)==1
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ifdef CONFIG_MAKE_WARN_UNDEFINED_VARIABLES
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MAKEFLAGS += --warn-undefined-variables
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endif
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# General make utilities
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# convenience variable for printing an 80 asterisk wide separator line
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SEPARATOR:="*******************************************************************************"
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# macro to remove quotes from an argument, ie $(call dequote,$(CONFIG_BLAH))
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define dequote
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$(subst ",,$(1))
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endef
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# " comment kept here to keep syntax highlighting happy
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# macro to keep an absolute path as-is, but resolve a relative path
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# against a particular parent directory
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#
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# $(1) path to resolve
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# $(2) directory to resolve non-absolute path against
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#
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# Path and directory don't have to exist (definition of a "relative
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# path" is one that doesn't start with /)
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#
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# $(2) can contain a trailing forward slash or not, result will not
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# double any path slashes.
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#
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# example $(call resolvepath,$(CONFIG_PATH),$(CONFIG_DIR))
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define resolvepath
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$(foreach dir,$(1),$(if $(filter /%,$(dir)),$(dir),$(subst //,/,$(2)/$(dir))))
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endef
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# macro to include a target only if it's on the list of targets that make
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# was invoked with
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#
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# This allows you to have something like an "order-only phony prerequisite",
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# ie a prerequisite that determines an order phony targets have to run in.
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#
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# Because normal order-only prerequisites don't work with phony targets.
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#
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# example $(call prereq_if_explicit,erase_flash)
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define prereq_if_explicit
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$(filter $(1),$(MAKECMDGOALS))
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endef
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# macro to kill duplicate items in a list without messing up the sort order of the list.
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# Will only keep the unique items; if there are non-unique items in the list, it will remove
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# the later recurring ones so only the first one remains.
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# Copied from http://stackoverflow.com/questions/16144115/makefile-remove-duplicate-words-without-sorting
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define uniq
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$(if $1,$(firstword $1) $(call uniq,$(filter-out $(firstword $1),$1)))
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endef
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