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8d84033b8c
Eliminate UT_T1_GPIO runner requirement by routing internally through gpio matrix and by setting gpio pins to GPIO_MODE_INPUT_OUTPUT mode for all interrupt related test cases.
32 lines
877 B
C
32 lines
877 B
C
/*
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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// The HAL layer for GPIO (common part)
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#include "soc/soc.h"
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#include "soc/gpio_periph.h"
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#include "hal/gpio_hal.h"
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void gpio_hal_intr_enable_on_core(gpio_hal_context_t *hal, gpio_num_t gpio_num, uint32_t core_id)
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{
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if (gpio_num < 32) {
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gpio_ll_clear_intr_status(hal->dev, BIT(gpio_num));
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} else {
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gpio_ll_clear_intr_status_high(hal->dev, BIT(gpio_num - 32));
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}
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gpio_ll_intr_enable_on_core(hal->dev, core_id, gpio_num);
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}
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void gpio_hal_intr_disable(gpio_hal_context_t *hal, gpio_num_t gpio_num)
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{
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gpio_ll_intr_disable(hal->dev, gpio_num);
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if (gpio_num < 32) {
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gpio_ll_clear_intr_status(hal->dev, BIT(gpio_num));
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} else {
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gpio_ll_clear_intr_status_high(hal->dev, BIT(gpio_num - 32));
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}
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}
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