mirror of
https://github.com/espressif/esp-idf.git
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133 lines
6.0 KiB
C
133 lines
6.0 KiB
C
/*
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* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: CC0-1.0
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*
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* OpenThread Border Router Example
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*
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* This example code is in the Public Domain (or CC0 licensed, at your option.)
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*
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* Unless required by applicable law or agreed to in writing, this
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* software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
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* CONDITIONS OF ANY KIND, either express or implied.
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*/
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#pragma once
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#include "esp_coexist.h"
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#include "esp_openthread_types.h"
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#if CONFIG_OPENTHREAD_RADIO_NATIVE
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#define ESP_OPENTHREAD_DEFAULT_RADIO_CONFIG() \
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{ \
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.radio_mode = RADIO_MODE_NATIVE, \
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}
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#elif CONFIG_OPENTHREAD_RADIO_SPINEL_UART
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#define ESP_OPENTHREAD_DEFAULT_RADIO_CONFIG() \
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{ \
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.radio_mode = RADIO_MODE_UART_RCP, \
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.radio_uart_config = { \
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.port = 1, \
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.uart_config = \
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{ \
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.baud_rate = 460800, \
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.data_bits = UART_DATA_8_BITS, \
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.parity = UART_PARITY_DISABLE, \
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.stop_bits = UART_STOP_BITS_1, \
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.flow_ctrl = UART_HW_FLOWCTRL_DISABLE, \
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.rx_flow_ctrl_thresh = 0, \
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.source_clk = UART_SCLK_DEFAULT, \
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}, \
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.rx_pin = 4, \
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.tx_pin = 5, \
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}, \
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}
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#else
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#define ESP_OPENTHREAD_DEFAULT_RADIO_CONFIG() \
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{ \
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.radio_mode = RADIO_MODE_SPI_RCP, \
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.radio_spi_config = { \
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.host_device = SPI2_HOST, \
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.dma_channel = 2, \
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.spi_interface = \
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{ \
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.mosi_io_num = 11, \
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.sclk_io_num = 12, \
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.miso_io_num = 13, \
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}, \
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.spi_device = \
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{ \
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.cs_ena_pretrans = 2, \
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.input_delay_ns = 100, \
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.mode = 0, \
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.clock_speed_hz = 2500 * 1000, \
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.spics_io_num = 10, \
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.queue_size = 5, \
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}, \
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.intr_pin = 8, \
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}, \
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}
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#endif // CONFIG_OPENTHREAD_RADIO_SPINEL_UART OR CONFIG_OPENTHREAD_RADIO_SPINEL_SPI
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#if CONFIG_IDF_TARGET_ESP32C2 && CONFIG_XTAL_FREQ_26
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#define HOST_BAUD_RATE 74880
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#else
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#define HOST_BAUD_RATE 115200
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#endif
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#define ESP_OPENTHREAD_DEFAULT_HOST_CONFIG() \
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{ \
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.host_connection_mode = HOST_CONNECTION_MODE_CLI_UART, \
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.host_uart_config = { \
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.port = 0, \
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.uart_config = \
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{ \
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.baud_rate = HOST_BAUD_RATE, \
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.data_bits = UART_DATA_8_BITS, \
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.parity = UART_PARITY_DISABLE, \
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.stop_bits = UART_STOP_BITS_1, \
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.flow_ctrl = UART_HW_FLOWCTRL_DISABLE, \
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.rx_flow_ctrl_thresh = 0, \
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.source_clk = UART_SCLK_DEFAULT, \
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}, \
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.rx_pin = UART_PIN_NO_CHANGE, \
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.tx_pin = UART_PIN_NO_CHANGE, \
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}, \
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}
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#define ESP_OPENTHREAD_DEFAULT_PORT_CONFIG() \
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{ \
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.storage_partition_name = "nvs", \
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.netif_queue_size = 10, \
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.task_queue_size = 10, \
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}
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#if CONFIG_EXTERNAL_COEX_ENABLE
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#if CONFIG_EXTERNAL_COEX_WIRE_TYPE == EXTERNAL_COEXIST_WIRE_1
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#define ESP_OPENTHREAD_DEFAULT_EXTERNAL_COEX_CONFIG() \
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{ \
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.request = CONFIG_EXTERNAL_COEX_REQUEST_PIN, \
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}
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#elif CONFIG_EXTERNAL_COEX_WIRE_TYPE == EXTERNAL_COEXIST_WIRE_2
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#define ESP_OPENTHREAD_DEFAULT_EXTERNAL_COEX_CONFIG() \
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{ \
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.request = CONFIG_EXTERNAL_COEX_REQUEST_PIN, \
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.grant = CONFIG_EXTERNAL_COEX_GRANT_PIN, \
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}
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#elif CONFIG_EXTERNAL_COEX_WIRE_TYPE == EXTERNAL_COEXIST_WIRE_3
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#define ESP_OPENTHREAD_DEFAULT_EXTERNAL_COEX_CONFIG() \
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{ \
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.request = CONFIG_EXTERNAL_COEX_REQUEST_PIN, \
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.priority = CONFIG_EXTERNAL_COEX_PRIORITY_PIN, \
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.grant = CONFIG_EXTERNAL_COEX_GRANT_PIN, \
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}
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#elif CONFIG_EXTERNAL_COEX_WIRE_TYPE == EXTERNAL_COEXIST_WIRE_4
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#define ESP_OPENTHREAD_DEFAULT_EXTERNAL_COEX_CONFIG() \
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{ \
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.request = CONFIG_EXTERNAL_COEX_REQUEST_PIN, \
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.priority = CONFIG_EXTERNAL_COEX_PRIORITY_PIN, \
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.grant = CONFIG_EXTERNAL_COEX_GRANT_PIN, \
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.tx_line = CONFIG_EXTERNAL_COEX_TX_LINE_PIN, \
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}
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#endif
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#endif // CONFIG_EXTERNAL_COEX_ENABLE
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