mirror of
https://github.com/espressif/esp-idf.git
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63 lines
2.2 KiB
C
63 lines
2.2 KiB
C
/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <sys/param.h>
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#include <inttypes.h>
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#include "sdkconfig.h"
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#include "esp_check.h"
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#include "esp_log.h"
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#include "esp_rom_caps.h"
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#include "soc/soc_caps.h"
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#include "hal/mmu_hal.h"
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#include "hal/cache_hal.h"
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#include "esp_cache.h"
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#include "esp_private/critical_section.h"
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static const char *TAG = "cache";
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DEFINE_CRIT_SECTION_LOCK_STATIC(s_spinlock);
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esp_err_t esp_cache_msync(void *addr, size_t size, int flags)
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{
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ESP_RETURN_ON_FALSE_ISR(addr, ESP_ERR_INVALID_ARG, TAG, "null pointer");
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ESP_RETURN_ON_FALSE_ISR(mmu_hal_check_valid_ext_vaddr_region(0, (uint32_t)addr, size, MMU_VADDR_DATA), ESP_ERR_INVALID_ARG, TAG, "invalid address");
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bool both_dir = (flags & ESP_CACHE_MSYNC_FLAG_DIR_C2M) && (flags & ESP_CACHE_MSYNC_FLAG_DIR_M2C);
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ESP_RETURN_ON_FALSE_ISR(!both_dir, ESP_ERR_INVALID_ARG, TAG, "both C2M and M2C directions are selected, you should only select one");
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uint32_t data_cache_line_size = cache_hal_get_cache_line_size(CACHE_TYPE_DATA);
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if ((flags & ESP_CACHE_MSYNC_FLAG_UNALIGNED) == 0) {
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bool aligned_addr = (((uint32_t)addr % data_cache_line_size) == 0) && ((size % data_cache_line_size) == 0);
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ESP_RETURN_ON_FALSE_ISR(aligned_addr, ESP_ERR_INVALID_ARG, TAG, "start address, end address or the size is(are) not aligned with the data cache line size (%d)B", data_cache_line_size);
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}
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uint32_t vaddr = (uint32_t)addr;
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if (flags & ESP_CACHE_MSYNC_FLAG_DIR_M2C) {
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ESP_EARLY_LOGD(TAG, "M2C DIR");
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esp_os_enter_critical_safe(&s_spinlock);
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//Add preload feature / flag here, IDF-7800
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cache_hal_invalidate_addr(vaddr, size);
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esp_os_exit_critical_safe(&s_spinlock);
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} else {
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ESP_EARLY_LOGD(TAG, "C2M DIR");
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#if SOC_CACHE_WRITEBACK_SUPPORTED
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esp_os_enter_critical_safe(&s_spinlock);
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cache_hal_writeback_addr(vaddr, size);
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esp_os_exit_critical_safe(&s_spinlock);
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if (flags & ESP_CACHE_MSYNC_FLAG_INVALIDATE) {
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esp_os_enter_critical_safe(&s_spinlock);
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cache_hal_invalidate_addr(vaddr, size);
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esp_os_exit_critical_safe(&s_spinlock);
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}
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#endif
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}
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return ESP_OK;
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}
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