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esp-idf/components/spi_flash/test
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Marius Vikhammer 0a95151a75 unit_test: Refactor all performance tests that rely on cache compensated timer 
There is no ccomp timer on C3, which means our performance tests will start
failing again due to variance caused by cache misses.

This MR adds TEST_PERFORMANCE_CCOMP_ macro that will only fail
performance test if CCOMP timer is supported on the target
2020-12-22 18:56:24 +11:00
..
CMakeLists.txt Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
component.mk ut: Move tests back from "esp32" subfolder 2020-01-06 17:13:53 +08:00
test_cache_disabled.c util-test: The cache and spi_flash tests passed 2019-09-09 16:59:29 +08:00
test_esp_flash.c unit_test: Refactor all performance tests that rely on cache compensated timer 2020-12-22 18:56:24 +11:00
test_flash_encryption.c spi_flash: support to verify written encrypted data 2019-10-30 05:49:50 +00:00
test_large_flash_writes.c spi_flash: resume unit tests for ESP32-S2 2020-02-26 11:12:08 +08:00
test_mmap.c spi_flash: Add ESP32-C3 support 2020-12-17 15:34:13 +11:00
test_out_of_bounds_write.c spi_flash: support working on differnt buses and frequency 2019-06-18 06:32:52 +00:00
test_partition_ext.c Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
test_partitions.c Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
test_read_write.c spi_flash: Add ESP32-C3 support 2020-12-17 15:34:13 +11:00
test_spi_flash.c unit_test: Refactor all performance tests that rely on cache compensated timer 2020-12-22 18:56:24 +11:00