mirror of
https://github.com/espressif/esp-idf.git
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476 lines
17 KiB
C
476 lines
17 KiB
C
/*
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* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "esp_efuse_utility.h"
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#include "soc/efuse_periph.h"
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#include "esp_log.h"
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#include "assert.h"
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#include "sdkconfig.h"
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#include <sys/param.h>
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static const char *TAG = "efuse";
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// This counter is used to implement independent read access for efuses.
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// During the read operation, the counter should be unchanged and even.
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// If it is not so, we must repeat the read to make sure that the burn operation does not affect the read data.
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static volatile unsigned s_burn_counter = 0;
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// Array for emulate efuse registers.
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#ifdef CONFIG_EFUSE_VIRTUAL
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uint32_t virt_blocks[EFUSE_BLK_MAX][COUNT_EFUSE_REG_PER_BLOCK];
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#ifndef BOOTLOADER_BUILD
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#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
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/* Call the update function to seed virtual efuses during initialization */
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__attribute__((constructor)) void esp_efuse_utility_update_virt_blocks(void);
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#endif // CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
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#endif // NOT BOOTLOADER_BUILD
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#endif // CONFIG_EFUSE_VIRTUAL
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extern const esp_efuse_range_addr_t range_read_addr_blocks[];
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extern const esp_efuse_range_addr_t range_write_addr_blocks[];
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static int get_reg_num(int bit_start, int bit_count, int i_reg);
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static int get_starting_bit_num_in_reg(int bit_start, int i_reg);
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static uint32_t get_mask(unsigned int bit_count, unsigned int shift);
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static int get_count_bits_in_reg(int bit_start, int bit_count, int i_reg);
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static void write_reg(esp_efuse_block_t blk, unsigned int num_reg, uint32_t value);
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static uint32_t fill_reg(int bit_start_in_reg, int bit_count_in_reg, uint8_t* blob, int* filled_bits_blob);
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static uint32_t set_cnt_in_reg(int bit_start_in_reg, int bit_count_used_in_reg, uint32_t reg_masked, size_t* cnt);
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static bool check_range_of_bits(esp_efuse_block_t blk, int offset_in_bits, int size_bits);
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// This function processes the field by calling the passed function.
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esp_err_t esp_efuse_utility_process(const esp_efuse_desc_t* field[], void* ptr, size_t ptr_size_bits, efuse_func_proc_t func_proc)
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{
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esp_err_t err = ESP_OK;
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int bits_counter = 0;
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// get and check size.
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int field_len = esp_efuse_get_field_size(field);
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int req_size = (ptr_size_bits == 0) ? field_len : MIN(ptr_size_bits, field_len);
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int i = 0;
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unsigned count_before = s_burn_counter;
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while (err == ESP_OK && req_size > bits_counter && field[i] != NULL) {
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if (check_range_of_bits(field[i]->efuse_block, field[i]->bit_start, field[i]->bit_count) == false) {
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ESP_EARLY_LOGE(TAG, "Range of data does not match the coding scheme");
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err = ESP_ERR_CODING;
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}
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int i_reg = 0;
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int num_reg;
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while (err == ESP_OK && req_size > bits_counter &&
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(num_reg = get_reg_num(field[i]->bit_start, field[i]->bit_count, i_reg)) != -1) {
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int start_bit = get_starting_bit_num_in_reg(field[i]->bit_start, i_reg);
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int num_bits = get_count_bits_in_reg(field[i]->bit_start, field[i]->bit_count, i_reg);
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if ((bits_counter + num_bits) > req_size) { // Limits the length of the field.
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num_bits = req_size - bits_counter;
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}
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ESP_EARLY_LOGD(TAG, "In EFUSE_BLK%d__DATA%d_REG is used %d bits starting with %d bit",
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(int)field[i]->efuse_block, num_reg, num_bits, start_bit);
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err = func_proc(num_reg, field[i]->efuse_block, start_bit, num_bits, ptr, &bits_counter);
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++i_reg;
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}
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i++;
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}
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unsigned count_after = s_burn_counter;
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if (err == ESP_OK &&
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(func_proc == esp_efuse_utility_fill_buff || func_proc == esp_efuse_utility_count_once) && // these functions are used for read APIs: read_field_blob and read_field_cnt
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(count_before != count_after || (count_after & 1) == 1)) {
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err = ESP_ERR_DAMAGED_READING;
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}
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assert(bits_counter <= req_size);
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return err;
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}
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// Read efuse register and write this value to array.
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esp_err_t esp_efuse_utility_fill_buff(unsigned int num_reg, esp_efuse_block_t efuse_block, int bit_start, int bit_count, void* arr_out, int* bits_counter)
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{
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uint8_t* blob = (uint8_t *) arr_out;
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uint32_t reg = esp_efuse_utility_read_reg(efuse_block, num_reg);
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uint64_t reg_of_aligned_bits = (reg >> bit_start) & get_mask(bit_count, 0);
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int shift_bit = (*bits_counter) % 8;
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if (shift_bit != 0) {
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blob[(*bits_counter) / 8] |= (uint8_t)(reg_of_aligned_bits << shift_bit);
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shift_bit = ((8 - shift_bit) < bit_count) ? (8 - shift_bit) : bit_count;
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(*bits_counter) += shift_bit;
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bit_count -= shift_bit;
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}
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int sum_shift = 0;
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while (bit_count > 0) {
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sum_shift += shift_bit;
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blob[(*bits_counter) / 8] |= (uint8_t)(reg_of_aligned_bits >> sum_shift);
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shift_bit = (bit_count > 8) ? 8 : bit_count;
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(*bits_counter) += shift_bit;
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bit_count -= shift_bit;
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};
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return ESP_OK;
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}
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// Count a set bits.
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esp_err_t esp_efuse_utility_count_once(unsigned int num_reg, esp_efuse_block_t efuse_block, int bit_start, int bit_count, void* out_cnt, int* bits_counter)
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{
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uint32_t reg = esp_efuse_utility_read_reg(efuse_block, num_reg);
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*((size_t *)out_cnt) += __builtin_popcount(reg & get_mask(bit_count, bit_start)); // Returns the number of 1-bits in reg.
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*bits_counter += bit_count;
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return ESP_OK;
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}
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// Fill registers from array for writing.
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esp_err_t esp_efuse_utility_write_blob(unsigned int num_reg, esp_efuse_block_t efuse_block, int bit_start, int bit_count, void* arr_in, int* bits_counter)
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{
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uint32_t reg_to_write = fill_reg(bit_start, bit_count, (uint8_t *)arr_in, bits_counter);
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return esp_efuse_utility_write_reg(efuse_block, num_reg, reg_to_write);
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}
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// fill registers with the required number of bits for writing.
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esp_err_t esp_efuse_utility_write_cnt(unsigned int num_reg, esp_efuse_block_t efuse_block, int bit_start, int bit_count, void* cnt, int* bits_counter)
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{
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esp_err_t err = ESP_OK;
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uint32_t reg = esp_efuse_utility_read_reg(efuse_block, num_reg);
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size_t* set_bits = (size_t*)cnt;
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uint32_t mask = get_mask(bit_count, bit_start);
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uint32_t reg_masked_bits = reg & mask;
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if ((reg_masked_bits ^ mask) != 0) {// register has free bits to set them to 1?
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uint32_t reg_to_write = set_cnt_in_reg(bit_start, bit_count, reg_masked_bits, set_bits);
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write_reg(efuse_block, num_reg, reg_to_write);
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}
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*bits_counter += bit_count;
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if ((*set_bits) == 0) {
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err = ESP_OK_EFUSE_CNT;
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}
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return err;
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}
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// Reset efuse write registers
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void esp_efuse_utility_reset(void)
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{
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++s_burn_counter;
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esp_efuse_utility_clear_program_registers();
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++s_burn_counter;
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for (int num_block = EFUSE_BLK0; num_block < EFUSE_BLK_MAX; num_block++) {
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for (uint32_t addr_wr_block = range_write_addr_blocks[num_block].start; addr_wr_block <= range_write_addr_blocks[num_block].end; addr_wr_block += 4) {
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REG_WRITE(addr_wr_block, 0);
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}
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}
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}
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// Burn values written to the efuse write registers
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void esp_efuse_utility_burn_efuses(void)
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{
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++s_burn_counter;
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esp_efuse_utility_burn_chip();
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++s_burn_counter;
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}
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// Erase the virt_blocks array.
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void esp_efuse_utility_erase_virt_blocks(void)
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{
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#ifdef CONFIG_EFUSE_VIRTUAL
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memset(virt_blocks, 0, sizeof(virt_blocks));
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#ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
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esp_efuse_utility_write_efuses_to_flash();
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#endif
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#endif // CONFIG_EFUSE_VIRTUAL
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}
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// Fills the virt_blocks array by values from efuse_Rdata.
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void esp_efuse_utility_update_virt_blocks(void)
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{
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#ifdef CONFIG_EFUSE_VIRTUAL
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#ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
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if (!esp_efuse_utility_load_efuses_from_flash()) {
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#else
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if (1) {
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#endif
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ESP_EARLY_LOGW(TAG, "Loading virtual efuse blocks from real efuses");
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for (int num_block = EFUSE_BLK0; num_block < EFUSE_BLK_MAX; num_block++) {
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int subblock = 0;
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for (uint32_t addr_rd_block = range_read_addr_blocks[num_block].start; addr_rd_block <= range_read_addr_blocks[num_block].end; addr_rd_block += 4) {
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virt_blocks[num_block][subblock++] = REG_READ(addr_rd_block);
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}
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ESP_EARLY_LOGD(TAG, "virt_blocks[%d] is filled by EFUSE_BLOCK%d", num_block, num_block);
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}
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#ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
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esp_efuse_utility_write_efuses_to_flash();
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#endif
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}
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#else
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ESP_EARLY_LOGI(TAG, "Emulate efuse is disabled");
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#endif
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}
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// Prints efuse values for all registers.
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void esp_efuse_utility_debug_dump_blocks(void)
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{
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esp_rom_printf("EFUSE_BLKx:\n");
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#ifdef CONFIG_EFUSE_VIRTUAL
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for (int num_block = EFUSE_BLK0; num_block < EFUSE_BLK_MAX; num_block++) {
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int num_reg = 0;
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esp_rom_printf("%d) ", num_block);
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for (uint32_t addr_rd_block = range_read_addr_blocks[num_block].start; addr_rd_block <= range_read_addr_blocks[num_block].end; addr_rd_block += 4, num_reg++) {
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esp_rom_printf("0x%08x ", virt_blocks[num_block][num_reg]);
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}
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esp_rom_printf("\n");
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}
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#else
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for (int num_block = EFUSE_BLK0; num_block < EFUSE_BLK_MAX; num_block++) {
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esp_rom_printf("%d) ", num_block);
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for (uint32_t addr_rd_block = range_read_addr_blocks[num_block].start; addr_rd_block <= range_read_addr_blocks[num_block].end; addr_rd_block += 4) {
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esp_rom_printf("0x%08x ", REG_READ(addr_rd_block));
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}
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esp_rom_printf("\n");
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}
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#endif
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esp_rom_printf("\n");
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}
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// returns the number of array elements for placing these bits in an array with the length of each element equal to size_of_base.
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int esp_efuse_utility_get_number_of_items(int bits, int size_of_base)
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{
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return bits / size_of_base + (bits % size_of_base > 0 ? 1 : 0);
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}
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// Writing efuse register with checking of repeated programming of programmed bits.
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esp_err_t esp_efuse_utility_write_reg(esp_efuse_block_t efuse_block, unsigned int num_reg, uint32_t reg_to_write)
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{
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esp_err_t err = ESP_OK;
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uint32_t reg = esp_efuse_utility_read_reg(efuse_block, num_reg);
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if (reg & reg_to_write) {
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ESP_EARLY_LOGE(TAG, "Repeated programming of programmed bits is strictly forbidden 0x%08x", reg & reg_to_write);
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err = ESP_ERR_EFUSE_REPEATED_PROG;
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} else {
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write_reg(efuse_block, num_reg, reg_to_write);
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}
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return err;
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}
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// Reading efuse register.
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uint32_t esp_efuse_utility_read_reg(esp_efuse_block_t blk, unsigned int num_reg)
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{
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assert(blk >= 0 && blk < EFUSE_BLK_MAX);
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assert(num_reg <= (range_read_addr_blocks[blk].end - range_read_addr_blocks[blk].start) / sizeof(uint32_t));
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uint32_t value;
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#ifdef CONFIG_EFUSE_VIRTUAL
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value = virt_blocks[blk][num_reg];
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#else
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value = REG_READ(range_read_addr_blocks[blk].start + num_reg * 4);
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#endif
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return value;
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}
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// Private functions
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// writing efuse register.
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static void write_reg(esp_efuse_block_t blk, unsigned int num_reg, uint32_t value)
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{
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assert(blk >= 0 && blk < EFUSE_BLK_MAX);
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assert(num_reg <= (range_read_addr_blocks[blk].end - range_read_addr_blocks[blk].start) / sizeof(uint32_t));
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uint32_t addr_wr_reg = range_write_addr_blocks[blk].start + num_reg * 4;
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uint32_t reg_to_write = REG_READ(addr_wr_reg) | value;
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// The register can be written in parts so we combine the new value with the one already available.
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REG_WRITE(addr_wr_reg, reg_to_write);
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}
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// return mask with required the number of ones with shift.
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static uint32_t get_mask(unsigned int bit_count, unsigned int shift)
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{
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uint32_t mask;
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if (bit_count != 32) {
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mask = (1 << bit_count) - 1;
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} else {
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mask = 0xFFFFFFFF;
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}
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return mask << shift;
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}
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// return the register number in the array. return -1 if all registers for field was selected.
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static int get_reg_num(int bit_start, int bit_count, int i_reg)
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{
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int num_reg = i_reg + bit_start / 32;
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if (num_reg > (bit_start + bit_count - 1) / 32) {
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return -1;
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}
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return num_reg;
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}
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// returns the starting bit number in the register.
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static int get_starting_bit_num_in_reg(int bit_start, int i_reg)
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{
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return (i_reg == 0) ? bit_start % 32 : 0;
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}
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// Returns the number of bits in the register.
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static int get_count_bits_in_reg(int bit_start, int bit_count, int i_reg)
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{
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int ret_count = 0;
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int num_reg = 0;
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int last_used_bit = (bit_start + bit_count - 1);
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for (int num_bit = bit_start; num_bit <= last_used_bit; ++num_bit) {
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++ret_count;
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if ((((num_bit + 1) % 32) == 0) || (num_bit == last_used_bit)) {
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if (i_reg == num_reg++) {
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return ret_count;
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}
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ret_count = 0;
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}
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}
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return 0;
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}
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// fill efuse register from array.
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static uint32_t fill_reg(int bit_start_in_reg, int bit_count_in_reg, uint8_t* blob, int* filled_bits_blob)
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{
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uint32_t reg_to_write = 0;
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uint32_t temp_blob_32;
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int shift_bit = (*filled_bits_blob) % 8;
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if (shift_bit != 0) {
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temp_blob_32 = blob[(*filled_bits_blob) / 8] >> shift_bit;
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shift_bit = ((8 - shift_bit) < bit_count_in_reg) ? (8 - shift_bit) : bit_count_in_reg;
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reg_to_write = temp_blob_32 & get_mask(shift_bit, 0);
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(*filled_bits_blob) += shift_bit;
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bit_count_in_reg -= shift_bit;
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}
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int shift_reg = shift_bit;
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while (bit_count_in_reg > 0) {
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temp_blob_32 = blob[(*filled_bits_blob) / 8];
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shift_bit = (bit_count_in_reg > 8) ? 8 : bit_count_in_reg;
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reg_to_write |= (temp_blob_32 & get_mask(shift_bit, 0)) << shift_reg;
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(*filled_bits_blob) += shift_bit;
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bit_count_in_reg -= shift_bit;
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shift_reg += 8;
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};
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return reg_to_write << bit_start_in_reg;
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}
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// sets a required count of bits as "1".
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static uint32_t set_cnt_in_reg(int bit_start_in_reg, int bit_count_used_in_reg, uint32_t reg_masked, size_t* cnt)
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{
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assert((bit_start_in_reg + bit_count_used_in_reg) <= 32);
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uint32_t reg_to_write = 0;
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for (int i = bit_start_in_reg; i < bit_start_in_reg + bit_count_used_in_reg; ++i) {
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if ((reg_masked & (1 << i)) == 0) {
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reg_to_write |= (1 << i);
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if (--(*cnt) == 0) {
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break;
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}
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}
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}
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return reg_to_write;
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}
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// check range of bits for any coding scheme.
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static bool check_range_of_bits(esp_efuse_block_t blk, int offset_in_bits, int size_bits)
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{
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int max_num_bit = offset_in_bits + size_bits;
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if (max_num_bit > 256) {
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return false;
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} else {
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ESP_EFUSE_FIELD_CORRESPONDS_CODING_SCHEME(blk, max_num_bit);
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}
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return true;
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}
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uint32_t esp_efuse_utility_get_read_register_address(esp_efuse_block_t block)
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{
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assert(block < EFUSE_BLK_MAX);
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#ifdef CONFIG_EFUSE_VIRTUAL
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return (uint32_t)&virt_blocks[block][0];
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#else
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return range_read_addr_blocks[block].start;
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#endif
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}
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#if defined(BOOTLOADER_BUILD) && defined(CONFIG_EFUSE_VIRTUAL) && !defined(CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH)
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void esp_efuse_init_virtual_mode_in_ram(void)
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{
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esp_efuse_utility_update_virt_blocks();
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}
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#endif
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#ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
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#include "../include_bootloader/bootloader_flash_priv.h"
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static uint32_t esp_efuse_flash_offset = 0;
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static uint32_t esp_efuse_flash_size = 0;
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void esp_efuse_init_virtual_mode_in_flash(uint32_t offset, uint32_t size)
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{
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esp_efuse_flash_offset = offset;
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esp_efuse_flash_size = size;
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esp_efuse_utility_update_virt_blocks();
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esp_efuse_utility_debug_dump_blocks();
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}
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void esp_efuse_utility_erase_efuses_in_flash(void)
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{
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if (esp_efuse_flash_offset == 0) {
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ESP_EARLY_LOGE(TAG, "no efuse partition in partition_table? (Flash is not updated)");
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abort();
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}
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esp_err_t err = bootloader_flash_erase_range(esp_efuse_flash_offset, esp_efuse_flash_size);
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if (err != ESP_OK) {
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ESP_EARLY_LOGE(TAG, "Failed to erase flash. err = 0x%x", err);
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abort();
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}
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}
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bool esp_efuse_utility_load_efuses_from_flash(void)
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{
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if (esp_efuse_flash_offset == 0) {
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ESP_EARLY_LOGE(TAG, "no efuse partition in partition_table? (Flash is not updated)");
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abort();
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}
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uint32_t efuses_in_flash[sizeof(virt_blocks)];
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esp_err_t err = bootloader_flash_read(esp_efuse_flash_offset, &efuses_in_flash, sizeof(efuses_in_flash), true);
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if (err != ESP_OK) {
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ESP_EARLY_LOGE(TAG, "Can not read eFuse partition from flash (err=0x%x)", err);
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abort();
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}
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|
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for (unsigned i = 0; i < sizeof(virt_blocks); ++i) {
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if (efuses_in_flash[i] != 0xFFFFFFFF) {
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ESP_EARLY_LOGW(TAG, "Loading virtual efuse blocks from flash");
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memcpy(virt_blocks, efuses_in_flash, sizeof(virt_blocks));
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return true;
|
|
}
|
|
}
|
|
return false;
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|
}
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|
|
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void esp_efuse_utility_write_efuses_to_flash(void)
|
|
{
|
|
if (esp_efuse_flash_offset == 0) {
|
|
ESP_EARLY_LOGE(TAG, "no efuse partition in partition_table? (Flash is not updated)");
|
|
abort();
|
|
}
|
|
|
|
esp_err_t err = bootloader_flash_erase_range(esp_efuse_flash_offset, esp_efuse_flash_size);
|
|
if (err != ESP_OK) {
|
|
ESP_EARLY_LOGE(TAG, "Failed to erase flash. err = 0x%x", err);
|
|
abort();
|
|
}
|
|
|
|
err = bootloader_flash_write(esp_efuse_flash_offset, &virt_blocks, sizeof(virt_blocks), false);
|
|
if (err != ESP_OK) {
|
|
ESP_EARLY_LOGE(TAG, "secure_version can not be written to flash. err = 0x%x", err);
|
|
abort();
|
|
}
|
|
}
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#endif // CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
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